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公开(公告)号：US12095421B2
公开(公告)日：2024-09-17
申请号：US17810792
申请日：2022-07-05
Applicant: Cisco Technology, Inc.
Inventor： Craig S. Appel , Peter C. Metz , Joseph V. Pampanin , Sanjay Sunder
CPC classification number: H03F1/0211 , H03F3/45179 , H03F3/45663 , H03K5/2481
Abstract: Embodiments provide for a tunable driving circuit by monitoring a frequency of a ring oscillator of an electrical integrated circuit connected to an optical modulator to determine operational characteristics of the electrical integrated circuit; setting, based on the operational characteristics, a driving voltage for a plurality of tunable inverters and a plurality of fixed gain inverters that control the optical modulator, wherein each tunable inverter of the plurality of tunable inverters is connected in parallel with a corresponding fixed gain inverter of the plurality of fixed gain inverters on one of a first arm and a second arm connected to the optical modulator; and setting an amplification strength for the plurality of tunable inverters based on the operational characteristics.
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公开(公告)号：US11454856B2
公开(公告)日：2022-09-27
申请号：US16746843
申请日：2020-01-18
Applicant: Cisco Technology, Inc.
Inventor： Craig S. Appel , Peter C. Metz
Abstract: The present disclosure provide for active boost in an electrical driver via a frequency comparator, configured to determine operational characteristics of an electrical circuit connected to an optical modulator based on a frequency difference between a ring oscillator and the clock signal; an electrical driver configured to drive a phase shift of a first optical signal carried on a first arm relative to a second optical signal carried on a second arm of an optical modulator, the electrical driver comprising: a first signal pathway, connected to the first arm of the optical modulator, wherein the first signal pathway includes: an adjustable gain inverter, electrically connected to first and second nodes; a fixed gain inverter, electrically connected to the first and second nodes; an inductor electrically connected between the second node and a third node; and a non-inverting amplifier connected between the third node and the first node.
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公开(公告)号：US11411538B2
公开(公告)日：2022-08-09
申请号：US16417295
申请日：2019-05-20
Applicant: Cisco Technology, Inc.
Inventor： Craig S. Appel , Peter C. Metz , Joseph V. Pampanin , Sanjay Sunder
Abstract: Embodiments provide for a tunable driving circuit by monitoring a frequency of a ring oscillator of an electrical integrated circuit connected to an optical modulator to determine operational characteristics of the electrical integrated circuit; setting, based on the operational characteristics, a driving voltage for a plurality of tunable inverters and a plurality of fixed gain inverters that control the optical modulator, wherein each tunable inverter of the plurality of tunable inverters is connected in parallel with a corresponding fixed gain inverter of the plurality of fixed gain inverters on one of a first arm and a second arm connected to the optical modulator; and setting an amplification strength for the plurality of tunable inverters based on the operational characteristics.
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公开(公告)号：US10965377B1
公开(公告)日：2021-03-30
申请号：US16745257
申请日：2020-01-16
Applicant: Cisco Technology, Inc.
Inventor： Craig S. Appel , Romesh Kumar Nandwana , Sanjay Sunder , Kadaba Lakshmikumar
IPC: H04B10/00 , H04B10/556 , G02B6/12 , G01B9/02 , H04B10/50 , H04B10/588 , H04B10/25 , H04J14/00
Abstract: Thermal tuning and quadrature control of opto-electronic devices using active extinction ratio tracking is proved by phase shifting, via a first phase shifter, a first optical signal carried on a first arm of an interferometer relative to a second optical signal carried on a second arm of the interferometer; combining the first optical signal with the second optical signal as an output signal; detecting a peak value in the output signal; and adjusting a relative phase offset imparted by the first phase shifter on the first optical signal relative to the second optical signal, based on the peak value, to increase an amplitude of the peak value. In various embodiments, the peak value is increased over time to maximize an extinction ratio of the optoelectronic device and maintain the extinction ratio in a maximized state during operation.
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公开(公告)号：US11227847B2
公开(公告)日：2022-01-18
申请号：US16809446
申请日：2020-03-04
Applicant: Cisco Technology, Inc.
Inventor： Vipulkumar K. Patel , Mark A. Webster , Craig S. Appel
Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.
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Patent Agency Ranking
公开(公告)号：US11099229B2
公开(公告)日：2021-08-24
申请号：US16740296
申请日：2020-01-10
Applicant: Cisco Technology, Inc.
Inventor： Sanjay Sunder , Prajwal M. Kasturi , Joseph V. Pampanin , Craig S. Appel
IPC: G01R31/28
Abstract: The fault detection system described provides an efficient method to test and monitor component to component connectivity in an electronic package using on chip test circuits and on chip components, which reduces the need for external testing equipment and analysis. The on chip nature allows for both real time testing in the assembly process of the electronic packages and during use of the electronic package by determining an on chip reference measurement and using the reference measurement to determine an operational status of the package.
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公开(公告)号：US20210215754A1
公开(公告)日：2021-07-15
申请号：US16740296
申请日：2020-01-10
Applicant: Cisco Technology, Inc.
Inventor： Sanjay Sunder , Prajwal M. Kasturi , Joseph V. Pampanin , Craig S. Appel
IPC: G01R31/28
Abstract: The fault detection system described provides an efficient method to test and monitor component to component connectivity in an electronic package using on chip test circuits and on chip components, which reduces the need for external testing equipment and analysis. The on chip nature allows for both real time testing in the assembly process of the electronic packages and during use of the electronic package by determining an on chip reference measurement and using the reference measurement to determine an operational status of the package.
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公开(公告)号：US11947239B2
公开(公告)日：2024-04-02
申请号：US17820747
申请日：2022-08-18
Applicant: Cisco Technology, Inc.
Inventor： Craig S. Appel , Peter C. Metz
CPC classification number: G02F1/225 , G02F1/0123 , G02F1/025 , G02F1/212
Abstract: The present disclosure provide for active boost in an electrical driver via a frequency comparator, configured to determine operational characteristics of an electrical circuit connected to an optical modulator based on a frequency difference between a ring oscillator and the clock signal; an electrical driver configured to drive a phase shift of a first optical signal carried on a first arm relative to a second optical signal carried on a second arm of an optical modulator, the electrical driver comprising: a first signal pathway, connected to the first arm of the optical modulator, wherein the first signal pathway includes: an adjustable gain inverter, electrically connected to first and second nodes; a fixed gain inverter, electrically connected to the first and second nodes; an inductor electrically connected between the second node and a third node; and a non-inverting amplifier connected between the third node and the first node.
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公开(公告)号：US11810877B2
公开(公告)日：2023-11-07
申请号：US17454937
申请日：2021-11-15
Applicant: Cisco Technology, Inc.
Inventor： Vipulkumar K. Patel , Mark A. Webster , Craig S. Appel
CPC classification number: H01L24/01 , H01L21/2007 , H01L23/5222 , G02B6/1225 , G02B6/305 , G02B2006/12061
Abstract: Embodiments herein describe providing a decoupling capacitor on a first wafer (or substrate) that is then bonded to a second wafer to form an integrated decoupling capacitor. Using wafer bonding means that the decoupling capacitor can be added to the second wafer without having to take up space in the second wafer. In one embodiment, after bonding the first and second wafers, one or more vias are formed through the second wafer to establish an electrical connection between the decoupling capacitor and bond pads on a first surface of the second wafer. An electrical IC can then be flip chipped bonded to the first surface. As part of coupling the decoupling capacitor to the electrical IC, the decoupling capacitor is connected between the rails of a power source (e.g., VDD and VSS) that provides power to the electrical IC.
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公开(公告)号：US11639955B2
公开(公告)日：2023-05-02
申请号：US17445616
申请日：2021-08-23
Applicant: Cisco Technology, Inc.
Inventor： Sanjay Sunder , Prajwal M. Kasturi , Joseph V. Pampanin , Craig S. Appel
IPC: G01R31/28
Abstract: The fault detection system described provides an efficient method to test and monitor component to component connectivity in an electronic package using on chip test circuits and on chip components, which reduces the need for external testing equipment and analysis. The on chip nature allows for both real time testing in the assembly process of the electronic packages and during use of the electronic package by determining an on chip reference measurement and using the reference measurement to determine an operational status of the package.
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