公开(公告)号：US20050237083A1

公开(公告)日：2005-10-27

申请号：US10843701

申请日：2004-05-10

申请人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William Plants

发明人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William Plants

IPC分类号： H01L20060101 ,  H03K19/177

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a digital input/output circuit block. A programmable interconnect architecture includes programmable elements and interconnect conductors. Ones of the programmable elements are coupled to the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, the digital input/output circuit block, and to the interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, and the digital input/output circuit block can be programmably coupled to one another.

摘要翻译： 一种可编程片上系统集成电路装置，包括可编程逻辑块，非易失性存储块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块。 可编程互连架构包括可编程元件和互连导体。 可编程元件的一部分耦合到可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块，数字输入/输出电路块和互连导体，使得 可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块的输入和输出可以可编程地彼此耦合。

公开(公告)号：US20080048717A1

公开(公告)日：2008-02-28

申请号：US11931772

申请日：2007-10-31

申请人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William Plants

发明人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William Plants

IPC分类号： H03K19/177

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a digital input/output circuit block. A programmable interconnect architecture includes programmable elements and interconnect conductors. Ones of the programmable elements are coupled to the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, the digital input/output circuit block, and to the interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, and the digital input/output circuit block can be programmably coupled to one another.

摘要翻译： 一种可编程片上系统集成电路装置，包括可编程逻辑块，非易失性存储块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块。 可编程互连架构包括可编程元件和互连导体。 可编程元件的一部分耦合到可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块，数字输入/输出电路块和互连导体，使得 可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块的输入和输出可以可编程地彼此耦合。

公开(公告)号：US20070176631A1

公开(公告)日：2007-08-02

申请号：US11567853

申请日：2006-12-07

申请人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William Plants

发明人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William Plants

IPC分类号： H03K19/177

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a digital input/output circuit block. A programmable interconnect architecture includes programmable elements and interconnect conductors. Ones of the programmable elements are coupled to the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, the digital input/output circuit block, and to the interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, and the digital input/output circuit block can be programmably coupled to one another.

摘要翻译： 一种可编程片上系统集成电路装置，包括可编程逻辑块，非易失性存储块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块。 可编程互连架构包括可编程元件和互连导体。 可编程元件的一部分耦合到可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块，数字输入/输出电路块和互连导体，使得 可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块的输入和输出可以可编程地彼此耦合。

公开(公告)号：US20090292937A1

公开(公告)日：2009-11-26

申请号：US12535814

申请日：2009-08-05

申请人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William C. Plants

发明人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William C. Plants

IPC分类号： G06F1/30 ,  H03K19/173

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a digital input/output circuit block. A programmable interconnect architecture includes programmable elements and interconnect conductors. Ones of the programmable elements are coupled to the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, the digital input/output circuit block, and to the interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, and the digital input/output circuit block can be programmably coupled to one another.

摘要翻译： 一种可编程片上系统集成电路装置，包括可编程逻辑块，非易失性存储块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块。 可编程互连架构包括可编程元件和互连导体。 可编程元件的一部分耦合到可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块，数字输入/输出电路块和互连导体，使得 可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块的输入和输出可以可编程地彼此耦合。

公开(公告)号：US20080122481A1

公开(公告)日：2008-05-29

申请号：US11932462

申请日：2007-10-31

申请人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William C. Plants

发明人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William C. Plants

IPC分类号： G06F7/38

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a digital input/output circuit block. A programmable interconnect architecture includes programmable elements and interconnect conductors. Ones of the programmable elements are coupled to the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, the digital input/output circuit block, and to the interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, and the digital input/output circuit block can be programmably coupled to one another.

公开(公告)号：US07613943B2

公开(公告)日：2009-11-03

申请号：US11931772

申请日：2007-10-31

申请人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William C. Plants

发明人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William C. Plants

IPC分类号： H03K19/173 ,  G06F1/30

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a digital input/output circuit block. A programmable interconnect architecture includes programmable elements and interconnect conductors. Ones of the programmable elements are coupled to the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, the digital input/output circuit block, and to the interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, and the digital input/output circuit block can be programmably coupled to one another.

公开(公告)号：US07487376B2

公开(公告)日：2009-02-03

申请号：US11932462

申请日：2007-10-31

申请人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William C. Plants

发明人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William C. Plants

IPC分类号： G06F1/26

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a digital input/output circuit block. A programmable interconnect architecture includes programmable elements and interconnect conductors. Ones of the programmable elements are coupled to the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, the digital input/output circuit block, and to the interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, and the digital input/output circuit block can be programmably coupled to one another.

摘要翻译： 一种可编程片上系统集成电路装置，包括可编程逻辑块，非易失性存储块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块。 可编程互连架构包括可编程元件和互连导体。 可编程元件的一部分耦合到可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块，数字输入/输出电路块和互连导体，使得 可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块的输入和输出可以可编程地彼此耦合。

公开(公告)号：US07170315B2

公开(公告)日：2007-01-30

申请号：US10843701

申请日：2004-05-10

申请人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William C. Plants

发明人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kolkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William C. Plants

IPC分类号： H03K19/173 ,  G06F13/00

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a digital input/output circuit block. A programmable interconnect architecture includes programmable elements and interconnect conductors. Ones of the programmable elements are coupled to the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, the digital input/output circuit block, and to the interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, and the digital input/output circuit block can be programmably coupled to one another.

摘要翻译： 一种可编程片上系统集成电路装置，包括可编程逻辑块，非易失性存储块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块。 可编程互连架构包括可编程元件和互连导体。 可编程元件的一部分耦合到可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块，数字输入/输出电路块和互连导体，使得 可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块的输入和输出可以可编程地彼此耦合。

公开(公告)号：US07937601B2

公开(公告)日：2011-05-03

申请号：US12535814

申请日：2009-08-05

申请人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kilkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William C. Plants

发明人： Greg Bakker ,  Khaled El-Ayat ,  Theodore Speers ,  Limin Zhu ,  Brian Schubert ,  Rabindranath Balasubramanian ,  Kurt Kilkind ,  Thomas Barraza ,  Venkatesh Narayanan ,  John McCollum ,  William C. Plants

IPC分类号： G06F1/30 ,  H03K19/173

CPC分类号： H03K19/1776 ,  G01K7/015 ,  G06F1/08 ,  G06F1/28 ,  G06F1/30 ,  G06F15/7842 ,  G06F15/7867 ,  H03F3/45475 ,  H03F2203/45136 ,  H03F2203/45166 ,  H03K17/223 ,  H03K19/177 ,  H03K19/17732

摘要： A programmable system-on-a-chip integrated circuit device comprises a programmable logic block, a non-volatile memory block, an analog sub-system, an analog input/output circuit block, and a digital input/output circuit block. A programmable interconnect architecture includes programmable elements and interconnect conductors. Ones of the programmable elements are coupled to the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, the digital input/output circuit block, and to the interconnect conductors, such that inputs and outputs of the programmable logic block, the non-volatile memory block, the analog sub-system, the analog input/output circuit block, and the digital input/output circuit block can be programmably coupled to one another.

摘要翻译： 一种可编程片上系统集成电路装置，包括可编程逻辑块，非易失性存储块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块。 可编程互连架构包括可编程元件和互连导体。 可编程元件的一部分耦合到可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块，数字输入/输出电路块和互连导体，使得 可编程逻辑块，非易失性存储器块，模拟子系统，模拟输入/输出电路块和数字输入/输出电路块的输入和输出可以可编程地彼此耦合。

公开(公告)号：US20050146354A1

公开(公告)日：2005-07-07

申请号：US11074922

申请日：2005-03-07

申请人： Arunangshu Kundu ,  Venkatesh Narayanan ,  John McCollum ,  William Plants

发明人： Arunangshu Kundu ,  Venkatesh Narayanan ,  John McCollum ,  William Plants

IPC分类号： H03K19/177

CPC分类号： H03K19/17736

摘要： A routing architecture in a field programmable gate array (FPGA) having a plurality of logic clusters wherein each logic cluster has at least two sub-clusters. The logic clusters are arranged in rows and columns and each logic clusters has a plurality of receiver components, a plurality of transmitter components, at least one buffer module, at least one sequential logic component and at least one combinatorial logic component. A first-level routing architecture is programmably coupled to the logic clusters and a second-level routing architecture is programmably coupled to the logic clusters and to the first-level routing architecture through at least one of the transmitter components and at least one of the receiver components.

摘要翻译： 具有多个逻辑集群的现场可编程门阵列（FPGA）中的路由架构，其中每个逻辑集群具有至少两个子集群。 逻辑簇以行和列排列，并且每个逻辑簇具有多个接收器组件，多个发射器组件，至少一个缓冲器模块，至少一个顺序逻辑组件和至少一个组合逻辑组件。 第一级路由架构可编程地耦合到逻辑集群，并且第二级路由架构可编程地耦合到逻辑集群，并通过至少一个发送器部件和至少一个接收器耦合到第一级路由架构 组件。