Complementary resistance switch, contact-connected polycrystalline piezo- or ferroelectric thin-film layer, method for encrypting a bit sequence
    1.
    发明申请
    Complementary resistance switch, contact-connected polycrystalline piezo- or ferroelectric thin-film layer, method for encrypting a bit sequence 有权
    互补电阻开关,接触式多晶压电或铁电薄膜层,加密位序列的方法

    公开(公告)号:US20150364682A1

    公开(公告)日:2015-12-17

    申请号:US14761319

    申请日:2014-01-16

    Abstract: Disclosed is a complementary resistor switch (3) comprising two outer contacts, between which two piezo- or ferroelectric layers (11a and 11b) having an inner common contact are situated. At least one region (11′, 11″) of the layers is modified, either the outer contacts are rectifying (S) and the inner contact is non-rectifying (0), or vice versa, the modified regions are formed at the rectifying contacts, the layers have different strain-dependent structural phases with different band gaps and/or different polarization charges, and the electrical conductivity of the layers is different. Also disclosed are a connectable resistor structure having at least one Schottky contact at two adjoining piezo- or ferroelectric layers, a polycrystalline piezo- or ferroelectric layer comprising modified crystallites, and a method and circuits for encrypting and decrypting a bit sequence.

    Abstract translation: 公开了一种互补电阻器开关(3),其包括两个外部触点,在其间位于具有内部公共触点的两个压电层或铁电层(11a和11b)之间。 这些层的至少一个区域(11',11“)被修改,外部触点是整流(S),内部触点是非整流(0),反之亦然,修正区域形成在整流 接触,这些层具有不同的带隙和/或不同极化电荷的不同的应变依赖结构相,并且层的导电性不同。 还公开了一种可连接的电阻器结构,其在两个相邻的压电或铁电层具有至少一个肖特基接触,包含经修改的微晶的多晶压电或铁电层,以及用于加密和解密位序列的方法和电路。

    TRANSPARENT SPECIMEN SLIDE
    3.
    发明申请

    公开(公告)号:US20210024863A1

    公开(公告)日:2021-01-28

    申请号:US17044592

    申请日:2019-04-03

    Abstract: A transparent specimen slide on which the range and the magnitude of the near-surface electrostatic forces can be influenced and set during a process of producing the specimen slide. The specimen slide has a surface on the supporting side and a surface facing away from the supporting side and at least three layers: an electrically insulating first layer, a silicon-containing second layer arranged on the first layer, and an electrically insulating third layer arranged on the second layer. An interface is formed between the first and second layers and between the second and third layers with a first surface charge density. The interface between the second and third layers has a second surface charge density. The first and second surface charge densities have the same or different signs.

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