公开(公告)号：US20170199148A1

公开(公告)日：2017-07-13

申请号：US14993871

申请日：2016-01-12

申请人： Helen Berney ,  William Allan Lane ,  Patrick Martin McGuinness ,  Thomas G. O'Dwyer

发明人： Helen Berney ,  William Allan Lane ,  Patrick Martin McGuinness ,  Thomas G. O'Dwyer

IPC分类号： G01N27/414

CPC分类号： G01N27/4148 ,  G01N27/333

摘要： An integrated ion-sensitive probe is provided. In an example, an ion-sensitive probe can include a semiconductor substrate and a first passive electrode attached to the semiconductor substrate. The first passive electrode can be configured to contact a solution and to provide a first electrical voltage as function of a concentration of an ion within the solution. In certain examples, a passive reference electrode can be co-located on the semiconductor substrate. In some examples, processing electronics can be integrated on the semiconductor substrate.

公开(公告)号：US08357985B2

公开(公告)日：2013-01-22

申请号：US13350582

申请日：2012-01-13

申请人： William Allan Lane ,  Andrew David Bain ,  Derek Frederick Bowers ,  Paul Malachy Daly ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson

发明人： William Allan Lane ,  Andrew David Bain ,  Derek Frederick Bowers ,  Paul Malachy Daly ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson

IPC分类号： H01L29/02

CPC分类号： H01L29/7322 ,  H01L21/76283 ,  H01L29/0619 ,  H01L29/402 ,  H01L29/66272

摘要： A bipolar transistor comprising an emitter region, a base region and a collector region, and a guard region spaced from and surrounding the base. The guard region can be formed in the same steps that form the base, and can serve to spread out the depletion layer in operation.

摘要翻译： 包括发射极区域，基极区域和集电极区域的双极晶体管以及与基极隔开并围绕基极的保护区域。 保护区域可以形成在形成基底的相同步骤中，并且可以用于在操作中扩散耗尽层。

公开(公告)号：US08513713B2

公开(公告)日：2013-08-20

申请号：US13468809

申请日：2012-05-10

申请人： Paul Malachy Daly ,  Andrew David Bain ,  Derek Frederick Bowers ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson ,  William Allan Lane

发明人： Paul Malachy Daly ,  Andrew David Bain ,  Derek Frederick Bowers ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson ,  William Allan Lane

IPC分类号： H01L29/80

CPC分类号： H01L29/808 ,  H01L29/0843 ,  H01L29/66901

摘要： A junction field effect transistor having a drain and a source, each defined by regions of a first type of semiconductor interconnected by a channel, and in which a dopant profile at a side of the drain facing the channel is modified so as to provide a region of reduced doping compared to a body region of the drain. The region of reduced doping and the body region can be defined by the same mask and doping step, but the mask is shaped to provide a lesser amount and thus less depth of doping for the region of reduced doping.

摘要翻译： 具有漏极和源极的结型场效应晶体管，每个由通过沟道互连的第一类型半导体的区域限定，并且其中面向沟道的漏极侧的掺杂剂分布被修改以提供区域 与漏极的体区相比减少掺杂。 减少掺杂的区域和体区可以通过相同的掩模和掺杂步骤来限定，但是掩模被成形为为减少掺杂的区域提供较少量的掺杂深度。

公开(公告)号：US20110101424A1

公开(公告)日：2011-05-05

申请号：US12611052

申请日：2009-11-02

申请人： Paul Malachy Daly ,  Andrew David Bain ,  Derek Frederick Bowers ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson ,  William Allan Lane

发明人： Paul Malachy Daly ,  Andrew David Bain ,  Derek Frederick Bowers ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson ,  William Allan Lane

IPC分类号： H01L29/808 ,  H01L21/337

CPC分类号： H01L29/808 ,  H01L29/0843 ,  H01L29/66901

摘要： A junction field effect transistor having a drain and a source, each defined by regions of a first type of semiconductor interconnected by a channel, and in which a dopant profile at a side of the drain facing the channel is modified so as to provide a region of reduced doping compared to a body region of the drain. The region of reduced doping and the body region can be defined by the same mask and doping step, but the mask is shaped to provide a lesser amount and thus less depth of doping for the region of reduced doping.

摘要翻译： 具有漏极和源极的结型场效应晶体管，每个由通过沟道互连的第一类型半导体的区域限定，并且其中面向沟道的漏极侧的掺杂剂分布被修改以提供区域 与漏极的体区相比减少掺杂。 减少掺杂的区域和体区可以通过相同的掩模和掺杂步骤来限定，但是掩模被成形为为减少掺杂的区域提供较少量的掺杂深度。

公开(公告)号：US20110101423A1

公开(公告)日：2011-05-05

申请号：US12611055

申请日：2009-11-02

申请人： Derek Frederick Bowers ,  Andrew David Bain ,  Paul Malachy Daly ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson ,  William Allan Lane

发明人： Derek Frederick Bowers ,  Andrew David Bain ,  Paul Malachy Daly ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson ,  William Allan Lane

IPC分类号： H01L29/80 ,  H01L21/335

CPC分类号： H01L29/808 ,  H01L29/0843 ,  H01L29/66901

摘要： A field effect transistor having a drain, a gate and a source, where the drain and source are formed by semiconductor regions of a first type, and in which a further doped region is provided intermediate the gate and the drain. Field gradients around the drain are thereby reduced.

摘要翻译： 一种具有漏极，栅极和源极的场效应晶体管，其中漏极和源极由第一类型的半导体区域形成，并且其中在栅极和漏极之间设置另外的掺杂区域。 从而减少排水管周围的场梯度。

公开(公告)号：US08350352B2

公开(公告)日：2013-01-08

申请号：US12611074

申请日：2009-11-02

申请人： William Allan Lane ,  Andrew David Bain ,  Derek Frederick Bowers ,  Paul Malachy Daly ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson

发明人： William Allan Lane ,  Andrew David Bain ,  Derek Frederick Bowers ,  Paul Malachy Daly ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson

IPC分类号： H01L29/02

CPC分类号： H01L29/7322 ,  H01L21/76283 ,  H01L29/0619 ,  H01L29/402 ,  H01L29/66272

摘要： A bipolar transistor comprising an emitter region, a base region and a collector region, and a guard region spaced from and surrounding the base. The guard region can be formed in the same steps that form the base, and can serve to spread out the depletion layer in operation.

摘要翻译： 包括发射极区域，基极区域和集电极区域的双极晶体管以及与基极隔开并围绕基极的保护区域。 保护区域可以形成在形成基底的相同步骤中，并且可以用于在操作中扩散耗尽层。

公开(公告)号：US09520486B2

公开(公告)日：2016-12-13

申请号：US12612609

申请日：2009-11-04

申请人： Edward John Coyne ,  Patrick Martin McGuinness ,  Paul Malachy Daly ,  Bernard Patrick Stenson ,  David J. Clarke ,  Andrew David Bain ,  William Allan Lane

发明人： Edward John Coyne ,  Patrick Martin McGuinness ,  Paul Malachy Daly ,  Bernard Patrick Stenson ,  David J. Clarke ,  Andrew David Bain ,  William Allan Lane

IPC分类号： H01L21/331 ,  H01L23/60 ,  H01L29/78 ,  H01L29/735 ,  H01L27/02 ,  H01L29/06 ,  H01L29/40 ,  H01L29/36 ,  H01L29/08

CPC分类号： H01L27/0259 ,  H01L29/0692 ,  H01L29/0821 ,  H01L29/36 ,  H01L29/402 ,  H01L29/6625 ,  H01L29/735 ,  H01L2924/0002 ,  H01L2924/00

摘要： An apparatus including an electrostatic discharge (ESD) protection device comprising a semiconductor having first, second and third regions arranged to form a transistor, wherein the first region is doped with a first impurity of a first conductivity type and is separated from the second region which is doped with a second impurity of a second conductivity type opposite the first type, and wherein a dimensional constraint of the regions defines an operational threshold of the ESD protection device. In one example, the separation between a collector and an emitter of a bipolar transistor defines a trigger voltage to cause the electrostatic discharge protection device to become conducting. In another example, a width of a bipolar transistor base controls a holding voltage of the electrostatic discharge protection device.

摘要翻译： 一种包括静电放电（ESD）保护装置的装置，包括具有布置成形成晶体管的第一，第二和第三区域的半导体，其中第一区域掺杂有第一导电类型的第一杂质并与第二区域分离， 掺杂有与第一类型相反的第二导电类型的第二杂质，并且其中所述区域的尺寸约束限定了ESD保护装置的操作阈值。 在一个示例中，双极晶体管的集电极和发射极之间的间隔定义了使静电放电保护器件导通的触发电压。 在另一示例中，双极晶体管基极的宽度控制静电放电保护器件的保持电压。

公开(公告)号：US08390039B2

公开(公告)日：2013-03-05

申请号：US12611055

申请日：2009-11-02

申请人： Derek Frederick Bowers ,  Andrew David Bain ,  Paul Malachy Daly ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson ,  William Allan Lane

发明人： Derek Frederick Bowers ,  Andrew David Bain ,  Paul Malachy Daly ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson ,  William Allan Lane

IPC分类号： H01L29/80

CPC分类号： H01L29/808 ,  H01L29/0843 ,  H01L29/66901

摘要： A field effect transistor having a drain, a gate and a source, where the drain and source are formed by semiconductor regions of a first type, and in which a further doped region is provided intermediate the gate and the drain. Field gradients around the drain are thereby reduced.

摘要翻译： 一种具有漏极，栅极和源极的场效应晶体管，其中漏极和源极由第一类型的半导体区域形成，并且其中在栅极和漏极之间设置另外的掺杂区域。 从而减少排水管周围的场梯度。

公开(公告)号：US08193046B2

公开(公告)日：2012-06-05

申请号：US12611052

申请日：2009-11-02

申请人： Paul Malachy Daly ,  Andrew David Bain ,  Derek Frederick Bowers ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson ,  William Allan Lane

发明人： Paul Malachy Daly ,  Andrew David Bain ,  Derek Frederick Bowers ,  Anne Maria Deignan ,  Michael Thomas Dunbar ,  Patrick Martin McGuinness ,  Bernard Patrick Stenson ,  William Allan Lane

IPC分类号： H01L21/337

CPC分类号： H01L29/808 ,  H01L29/0843 ,  H01L29/66901

摘要： A junction field effect transistor having a drain and a source, each defined by regions of a first type of semiconductor interconnected by a channel, and in which a dopant profile at a side of the drain facing the channel is modified so as to provide a region of reduced doping compared to a body region of the drain. The region of reduced doping and the body region can be defined by the same mask and doping step, but the mask is shaped to provide a lesser amount and thus less depth of doping for the region of reduced doping.

摘要翻译： 具有漏极和源极的结型场效应晶体管，每个由通过沟道互连的第一类型半导体的区域限定，并且其中面向沟道的漏极侧的掺杂剂分布被修改以提供区域 与漏极的体区相比减少掺杂。 减少掺杂的区域和体区可以通过相同的掩模和掺杂步骤来限定，但是掩模被成形为为减少掺杂的区域提供较少量的掺杂深度。

公开(公告)号：US20120074493A1

公开(公告)日：2012-03-29

申请号：US12893794

申请日：2010-09-29

申请人： Edward John Coyne ,  Paul Malachy Daly ,  Jagar Singh ,  Seamus Whiston ,  Patrick Martin McGuinness ,  William Allan Lane

发明人： Edward John Coyne ,  Paul Malachy Daly ,  Jagar Singh ,  Seamus Whiston ,  Patrick Martin McGuinness ,  William Allan Lane

IPC分类号： H01L29/78 ,  H01L21/336

CPC分类号： H01L29/0847 ,  H01L29/1045 ,  H01L29/1083 ,  H01L29/402 ,  H01L29/66537 ,  H01L29/66575 ,  H01L29/66659 ,  H01L29/7833 ,  H01L29/7835

摘要： Transistors having improved breakdown voltages and methods of forming the same are provided herein. In one embodiment, a method of forming a transistor comprises the steps of: forming a drain and a source by doping a semiconductor with a first dopant type to form a first type of semiconductor, the drain and source being separated from one another, wherein the drain comprises a first drain region of a first dopant concentration adjacent a second drain region, such that at least a portion of the second drain region is positioned between the first drain region and the source, and further comprising forming an intermediate region by doping the semiconductor so as to form a second type of semiconductor intermediate the drain and source, the intermediate region spaced apart from the second drain region.

摘要翻译： 具有改进的击穿电压的晶体管及其形成方法在此提供。 在一个实施例中，形成晶体管的方法包括以下步骤：通过掺杂具有第一掺杂剂类型的半导体形成漏极和源极以形成第一类型的半导体，所述漏极和源极彼此分离，其中 漏极包括与第二漏极区相邻的第一掺杂剂浓度的第一漏极区域，使得第二漏极区域的至少一部分位于第一漏极区域和源极之间，并且还包括通过掺杂半导体形成中间区域 以便形成位于漏极和源极之间的第二类型的中间区域，该中间区域与第二漏极区域间隔开。