Semiconductor integrated circuit and data processing system
    6.
    发明授权
    Semiconductor integrated circuit and data processing system 失效
    半导体集成电路和数据处理系统

    公开(公告)号:US06459621B1

    公开(公告)日:2002-10-01

    申请号:US09931030

    申请日:2001-08-17

    IPC分类号: G11C1134

    摘要: A control of a flash memory includes control for supplying a pulse-shaped voltage to each of non-volatile memory cells until a threshold voltage of the non-volatile memory cell having a first threshold voltage is changed to a second threshold voltage. The control involves a first write mode (coarse write) in which the amount of change in threshold voltage of each non-volatile memory cell, which is varied each time the pulse-shaped voltage is applied, is relatively rendered high, and a second write mode (high-accuracy write) in which the amount of change in threshold voltage thereof is relatively rendered low. As compared with the high-accuracy mode, the number of pulses required to change the threshold voltage of each memory cell is smaller than that in the coarse write mode. Therefore, the number of verify operations at the time that the coarse write mode is used, is small and hence the entire write operation can be speeded up.

    摘要翻译: 闪速存储器的控制包括用于向每个非易失性存储单元提供脉冲状电压的控制,直到具有第一阈值电压的非易失性存储单元的阈值电压变为第二阈值电压为止。 控制涉及第一写入模式(粗写),其中每当施加脉冲形状电压时变化的每个非易失性存储单元的阈值电压的变化量相对变高,并且第二写入 模式(高精度写入),其中阈值电压的变化量相对低。 与高精度模式相比,改变每个存储单元的阈值电压所需的脉冲数小于粗写模式时的脉冲数。 因此,使用粗写入模式时的验证操作数量很少,因此可以加快整个写入操作。

    Semiconductor integrated circuit with multiple write operation modes
    9.
    发明授权
    Semiconductor integrated circuit with multiple write operation modes 失效
    具有多种写操作模式的半导体集成电路

    公开(公告)号:US6091640A

    公开(公告)日:2000-07-18

    申请号:US941676

    申请日:1997-09-30

    摘要: A control of a flash memory includes control for supplying a pulse-shaped voltage to each of non-volatile memory cells until a threshold voltage of the non-volatile memory cell having a first threshold voltage is changed to a second threshold voltage. The control involves a first write mode (coarse write) in which the amount of change in threshold voltage of each non-volatile memory cell, which is varied each time the pulse-shaped voltage is applied, is relatively rendered high, and a second write mode (high-accuracy write) in which the amount of change in threshold voltage thereof is relatively rendered low. As compared with the high-accuracy mode, the number of pulses required to change the threshold voltage of each memory cell is smaller than that in the coarse write mode. Therefore, the number of verify operations at the time that the coarse write mode is used, is small and hence the entire write operation can be speeded up.

    摘要翻译: 闪速存储器的控制包括用于向每个非易失性存储单元提供脉冲状电压的控制,直到具有第一阈值电压的非易失性存储单元的阈值电压变为第二阈值电压为止。 控制涉及第一写入模式(粗写),其中每当施加脉冲形状电压时变化的每个非易失性存储单元的阈值电压的变化量相对变高,并且第二写入 模式(高精度写入),其中阈值电压的变化量相对低。 与高精度模式相比,改变每个存储单元的阈值电压所需的脉冲数小于粗写模式时的脉冲数。 因此,使用粗写入模式时的验证操作数量很少,因此可以加快整个写入操作。