Flat screen display device using controlled cold cathodes
    2.
    发明授权
    Flat screen display device using controlled cold cathodes 失效
    平板显示装置采用受控冷阴极

    公开(公告)号:US3882355A

    公开(公告)日:1975-05-06

    申请号:US31958772

    申请日:1972-12-29

    Applicant: IBM

    Inventor: DE WITT DAVID

    CPC classification number: H01J29/04 H01J31/127 H01J2201/308 H01J2201/319

    Abstract: The display device has an electrically conductive phosphorcoated transparent screen, a panel element disposed in close parallel relation to the screen with the panel having an array of electron emitting regions on a semiconductor plate, each controlled by an adjacent memory cell in the plate. An enclosure which includes the screen surrounds the panel. An electric potential is established between the screen and the panel, and a vacuum produced in the enclosure. Preferably, the memory cells associated with the electron emitting regions are storage elements of a shift register which extend throughout the entire array of electron emitters. A binary signal is introduced into the shift register which is used to establish a predetermined pattern of electron emitting regions on the semiconductor panel. This produces a display on the spaced transparent screen when the emitted electrons strike the phosphor on the screen.

    Abstract translation: 显示装置具有导电磷光体透明屏幕,与屏幕紧密平行地设置的面板元件,其中面板在半导体板上具有由电子发射区域排列的阵列,各自由板中的相邻存储单元控制。 包括屏幕的外壳围绕面板。 在屏幕和面板之间建立电位,并在外壳中产生真空。 优选地,与电子发射区域相关联的存储单元是移动寄存器的存储元件,其遍及整个电子发射器阵列。 将二进制信号引入移位寄存器,该移位寄存器用于在半导体面板上建立电子发射区域的预定图案。 当发射的电子撞击屏幕上的荧光体时,这会在间隔开的透明屏幕上产生显示。

    Field effect transistor structure for minimizing parasitic inversion and process for fabricating
    3.
    发明授权
    Field effect transistor structure for minimizing parasitic inversion and process for fabricating 失效
    用于最小化PARASITIC逆变的场效应晶体管结构和制造方法

    公开(公告)号:US3860454A

    公开(公告)日:1975-01-14

    申请号:US37415273

    申请日:1973-06-27

    Applicant: IBM

    CPC classification number: H01L21/00 H01L21/18 H01L29/00 H01L29/66477

    Abstract: A process for fabricating a field effect transistor having minimal parasitic inversion wherein a field layer of insulating material is formed on a monocrystalline substrate having spaced source and drain regions, an opening formed in the field layer over the gate region, and the body bombarded with impurity ions of the same type as the background doping of the semiconductor body, the bombarding done at an energy sufficient to traverse the field insulation layer to produce an increased concentration of impurity ions just beneath the interface of the semiconductor body and field oxide, and a buried layer of impurity in the gate region.

    Abstract translation: 一种用于制造具有最小寄生反转的场效应晶体管的工艺,其中绝缘材料的场层形成在具有间隔的源极和漏极区域的单晶衬底上,在栅极区域上形成在场层中的开口,以及用杂质轰击的体 与半导体本体的背景掺杂相同类型的离子,以足以穿过场绝缘层的能量进行轰击,以产生正好在半导体主体和场氧化物的界面之下的杂质离子的增加的浓度,以及掩埋 栅极区杂质层。

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