公开(公告)号：US3697318A

公开(公告)日：1972-10-10

申请号：US3697318D

申请日：1969-12-12

Applicant: IBM

Inventor： FEINBERG IRVING ,  LANGDON JACK L ,  SITLER CARL L

IPC: H01L21/82 ,  H01L23/04 ,  H01L27/06 ,  H01L27/118 ,  B44D1/18 ,  H01B13/00 ,  H05K3/00

CPC classification number: H01L23/041 ,  H01L21/82 ,  H01L27/0658 ,  H01L27/118 ,  H01L2924/0002 ,  Y10S148/085 ,  Y10S148/102 ,  Y10S148/115 ,  Y10S438/975 ,  Y10T29/49133 ,  H01L2924/00

Abstract: THIS INVENTION RELATES GENERALLY TO MONOLITHIC INTEGRATED STRUCTURES INCLUDING THE FABRICATION THEREOF AND, MORE PARTICULARLY, TO A MONOLITHIC INTEGRATED STRUCTURE THAT IS USED TO PROVIDE A MULTIPLICITY OF VARIOUS CIRCUIT INTERCONNECTIONS SO AS TO PERMIT MORE THAN ONE CIRCUIT TO BE MADE FOR EACH STRUCTURE. MANY LOGIC TYPE INTEGRATED STRUCTURES CAN BE FABRICATED FROM A SINGLE MASTER SLICE CONFIGURATION WHICH CONTAINS A NUMBER OF COMPONENTS IN A PATTERN FAVORABLE TO THE FORMATION OF ANY SELECTED LOGIC CIRCUIT FROM A CLASS OF MANY SUCH CIRCUITS. ADDITIONALLY, FABRICATION TECHNIQUES ARE DESCRIBED FOR FACILITATING FORMATION OF THE INTEGRATED CHIP WHICH INCLUDE MASK ALIGNMENT TECHNIQUES, CHIP TESTING TECHNIQUES, CHIP IDENTIFICATION, PROCESS STEP IDENTIFICATION, ENGINEERING CHANGE NUMBER IDENTIFICATION, ETC.

公开(公告)号：US3539876A

公开(公告)日：1970-11-10

申请号：US3539876D

申请日：1967-05-23

Applicant: IBM

Inventor： FEINBERG IRVING ,  LANGDON JACK L ,  SITLER CARL L

IPC: H01L21/8222 ,  H01L23/04 ,  H01L27/06 ,  H01L27/118 ,  H02B1/04 ,  H05K1/16

CPC classification number: H01L27/0658 ,  H01L21/8222 ,  H01L23/041 ,  H01L27/118 ,  H01L2224/16 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01037 ,  H01L2924/01068 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15173 ,  H01L2924/3025 ,  Y10S148/037 ,  Y10S148/043 ,  Y10S148/085 ,  Y10S148/102 ,  Y10S148/162