Method of making a semiconductor resistor
    1.
    发明授权
    Method of making a semiconductor resistor 失效
    制造半导体电阻的方法

    公开(公告)号:US3879236A

    公开(公告)日:1975-04-22

    申请号:US32927973

    申请日:1973-02-02

    Applicant: IBM

    Inventor: LANGDON JACK L

    CPC classification number: H01L29/8605 Y10S148/037 Y10S148/085 Y10S148/145

    Abstract: A diffused resistor structure and method for fabrication which produces the resistor electrical contacts below the surface of the semiconductor device. The resistor structure includes a resistor region of a first conductivity type surrounded at the surface of the region by a region of a second conductivity. At least two spaced semiconductor electrical contacts of a first conductivity are made to the resistor region. The contacts are below the surface of the resistor structure. Electrical contacts are provided on the surface of the structure spaced from the resistor region and electrically connected to the two spaced semiconductor contacts below the surface of the resistor structure.

    Abstract translation: 扩散电阻器结构和制造方法,其在半导体器件的表面下方产生电阻器电接触。 电阻器结构包括第一导电类型的电阻器区域,其在该区域的表面处被第二导电性区域包围。 至少两个间隔开的第一电导率的半导体电触头被制成电阻器区域。 触点位于电阻结构的表面之下。 电触点设置在与电阻器区域间隔开的结构的表面上,并电连接到电阻器结构表面下面的两个间隔开的半导体触点。

    Construction of monolithic chip and method of distributing power therein for individual electronic devices constructed thereon
    6.
    发明授权
    Construction of monolithic chip and method of distributing power therein for individual electronic devices constructed thereon 失效
    单片机的构造及其分配电源的方法,用于构建其上的个别电子设备

    公开(公告)号:US3656028A

    公开(公告)日:1972-04-11

    申请号:US3656028D

    申请日:1969-05-12

    Applicant: IBM

    Inventor: LANGDON JACK L

    Abstract: To eliminate parasitic voltage drops to electrodes of semiconductor devices built on a semiconductor chip or wafer, due to the use of an element of a voltage and current supply conductor in common for several such semiconductor devices, a separate path is diffused for each electrode, onto such chip or wafer as a built-up post of the basic semiconductor material of the chip or wafer, and the back surface of the chip or wafer is used as a relatively wide area surface as a voltage supply bus, which may also be connected to a metal base for the double purpose of establishing that surface at some selected known potential and providing a good heat sink for the chip or wafer. Generally, the potential of the metal base may be placed at ground, but need not be.

    Abstract translation: 为了消除由半导体芯片或晶片构成的半导体器件的电极引起的寄生电压降,由于使用电压和电流供应导体的元件对于几个这样的半导体器件是共同的,单独的路径被扩散到每个电极,到 作为芯片或晶片的基本半导体材料的组合柱以及芯片或晶片的背面的这种芯片或晶片被用作相对宽的区域表面作为电压供应总线,其也可以连接到 金属基底,用于在某些选定的已知电位建立该表面并为芯片或晶片提供良好的散热器的双重目的。 通常,金属基底的电位可以放置在地面上,但不需要。

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