Abstract:
A phase shifter includes first and second RF terminals, a reference potential terminal; a lumped element LC network connected to the first and second RF terminals and the reference potential terminal, and first and second active semiconductor devices connected to the lumped element LC network and to the reference potential terminal. Each of the first and second active semiconductor devices include a control terminal and first and second output terminals. The lumped element LC network presents a reactance across the first and second RF terminals that shifts the phase of an RF signal as between the first and second RF terminals. The first and second active semiconductor devices are configured to tune the phase shift of the RF signal by controlling the reactance across the first and second RF terminals.
Abstract:
Embodiments relate to outphasing amplifiers and amplification. One example system includes a signal splitter configured to receive an input signal and output a plurality of signals, wherein the signal splitter shifts each of the plurality of signals by a distinct phase based at least in part on a power of the input signal; a plurality of power amplifiers (PAs), each configured to amplify a distinct signal of the plurality of signals to generate a distinct amplified signal; a plurality of input matching networks, each coupled to a distinct PA of the plurality of PAs and configured to transform an input impedance of the coupled PA to an outphasing load condition based on the distinct signal the coupled PA is configured to amplify; and a combiner configured to combine the plurality of distinct amplified signals to generate an amplified input signal.
Abstract:
An amplifier circuit includes an RF amplifier that is configured to amplify an RF signal between a first terminal and a second terminal across an RF frequency range. The amplifier circuit includes a multi-stage impedance matching network having a broadband impedance transformer, a phase shifter, and a high-pass impedance transformer connected in series with one another between a first port of the amplifier circuit and the first terminal. The broadband impedance transformer provides impedance transformation in the RF frequency range. The phase shifter shifts a phase output port reflection coefficient in a second order harmonic frequency range that overlaps with a second order harmonic of the fundamental RF frequency. The high-pass impedance transformer transmits an RF signal in the RF frequency range while providing impedance transformation in the RF frequency range and transmits RF signals in the second order harmonic frequency range with low impedance.
Abstract:
An amplifier circuit includes an RF input port, an RF output port, a reference potential port, and an RF amplifier having an input terminal and a first output terminal. An output impedance matching network electrically couples the first output terminal to the RF output port. A first inductor is electrically connected in series between the first output terminal and the RF output port, a first LC resonator is directly electrically connected between the first output terminal and the reference potential port, and a second LC resonator is directly electrically connected between the first output terminal and the reference potential port. The first LC resonator is configured to compensate for an output capacitance of the RF amplifier at a center frequency of the RF signal. The second LC resonator is configured to compensate for a second order harmonic of the RF signal.
Abstract:
A phase shifter having a four port hybrid coupler is provided. The four port hybrid coupler has first and second input ports and first and second output ports. The four port hybrid coupler is configured to shift the phase of an RF signal as between the first and second input ports. First and second active semiconductor devices are connected to first and second output ports. The first and second active semiconductor devices are configured to change the phase shift of the RF signal as between the first and second input ports based upon a varying voltage
Abstract:
A peaking amplifier is disclosed. The peaking amplifier includes a driver stage, a final stage, and an interstage matching network. The driver stage has a load impedance and is configured to generate a driver output based on an input signal. The final stage has a final stage input impedance and is configured to generate a peaking output based on the driver output. The interstage matching network is coupled to the driver stage and the final stage. The interstage matching network is configured to transform the final stage input impedance to the load impedance for the driver stage when the peaking amplifier is ON and to provide a short to an input of the final stage when the peaking amplifier is in an OFF state.
Abstract:
Embodiments relate to outphasing amplifiers and amplification. One example system includes a signal splitter configured to receive an input signal and output a plurality of signals, wherein the signal splitter shifts each of the plurality of signals by a distinct phase based at least in part on a power of the input signal; a plurality of power amplifiers (PAs), each configured to amplify a distinct signal of the plurality of signals to generate a distinct amplified signal; a plurality of input matching networks, each coupled to a distinct PA of the plurality of PAs and configured to transform an input impedance of the coupled PA to an outphasing load condition based on the distinct signal the coupled PA is configured to amplify; and a combiner configured to combine the plurality of distinct amplified signals to generate an amplified input signal.
Abstract:
A peaking amplifier is disclosed. The peaking amplifier includes a driver stage, a final stage, and an interstage matching network. The driver stage has a load impedance and is configured to generate a driver output based on an input signal. The final stage has a final stage input impedance and is configured to generate a peaking output based on the driver output. The interstage matching network is coupled to the driver stage and the final stage. The interstage matching network is configured to transform the final stage input impedance to the load impedance for the driver stage when the peaking amplifier is ON and to provide a short to an input of the final stage when the peaking amplifier is in an OFF state.
Abstract:
An RF amplifier includes an amplifier chip on a flange having an input and an output comprising a parasitic capacitance and a parasitic inductance, a first chip capacitor coupled to the output of the output of the amplifier by a first plurality of bond wires, and a second chip capacitor coupled to the first chip capacitor by a second plurality of bond wires, and an output impedance matching network having an input coupled to the output of the second chip capacitor by a third plurality of bond wires, and an output, and a phase shift between the input and the output of less than 90 degrees, wherein the phase shift from the output of the amplifier chip to the output of the output impedance matching network is 180 degrees.
Abstract:
An amplifier circuit includes a first port, a second port, a reference potential port, and an RF amplifier device having a first terminal electrically coupled to the first port, a second terminal electrically coupled to the second port, and a reference potential terminal electrically coupled to the reference potential port. The RF amplifier device amplifies an RF signal across an RF frequency range that includes a fundamental RF frequency. An impedance matching network is electrically coupled to the first terminal and the first port. The impedance matching network includes a baseband termination circuit that presents low impedance in a baseband frequency region, a fundamental frequency matching circuit that presents a complex conjugate of an intrinsic impedance of the RF amplifier device in the RF frequency range, and a second order harmonic termination circuit that presents low impedance at second order harmonics of frequencies in the fundamental RF frequency range.