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公开(公告)号:US20220116487A1
公开(公告)日:2022-04-14
申请号:US17556089
申请日:2021-12-20
申请人: Intel Corporation
发明人: Naru Dames SUNDAR , Chih-Jen CHANG
IPC分类号: H04L69/22
摘要: A stacked memory such as a high bandwidth memory (HBM) with a wide data path is used by a streaming pipeline in a network interface controller to buffer segments of a data packet to allow the network interface controller to perform operations on the packet payload. The headers and packet payload can be scanned and classified concurrently with the buffered payload parsed in parallel.
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公开(公告)号:US20220103530A1
公开(公告)日:2022-03-31
申请号:US17544699
申请日:2021-12-07
申请人: Intel Corporation
发明人: Daniel DALY , Anjali Singhai JAIN , Yadong LI , Stephen DOYLE , Naru Dames SUNDAR , Chih-Jen CHANG , Sailesh BISSESSUR , Andrew CUNNINGHAM , Edwin VERPLANKE , Patrick FLEMING
IPC分类号: H04L9/08
摘要: Examples described herein relate to a network interface device that includes circuitry, configured to perform encryption of data, generate one or more packets from the encrypted data, cause transmission of the one or more packets with the encrypted data, manage reliability of transport of the transmitted one or more packets with the encrypted data, and share protocol state information between a host system and the network interface device using connectivity based on user space accessible queues.
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公开(公告)号:US20190207868A1
公开(公告)日:2019-07-04
申请号:US16276979
申请日:2019-02-15
申请人: Intel Corporation
发明人: Chih-Jen CHANG , Daniel Christian BIEDERMAN , Matthew James WEBB , Wing CHEUNG , Jose NIELL , Robert HATHAWAY
IPC分类号: H04L12/927 , H04L12/851 , H04L12/721 , H04L12/24
CPC分类号: H04L47/805 , H04L41/042 , H04L45/38 , H04L47/2433 , H04L47/2483 , H04L2212/00
摘要: A compute device can access local or remote accelerator devices for use in processing a received packet. The received packet can be processed by any combination of local accelerator devices and remote accelerator devices. In some cases, the received packet can be encapsulated in an encapsulating packet and sent to a remote accelerator device for processing. The encapsulating packet can indicate a priority level for processing the received packet and its associated processing task. The priority level can override a priority level that would otherwise be assigned to the received packet and its associated processing task. The remote accelerator device can specify a fullness of an input queue to the compute device. Other information can be conveyed by packets transmitted between and among compute devices and remote accelerator devices to assist in determining an accelerator to use or other uses.
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公开(公告)号:US20220197805A1
公开(公告)日:2022-06-23
申请号:US17479954
申请日:2021-09-20
申请人: Intel Corporation
发明人: Shaopeng HE , Anjali Singhai JAIN , Patrick MALONEY , Yadong LI , Chih-Jen CHANG , Kun TIAN , Yan ZHAO , Rajesh M. SANKARAN , Ashok RAJ
IPC分类号: G06F12/0831 , G06F12/1009 , G06F9/455
摘要: Examples described herein relate to at least one processor and circuitry, when operational, to: in connection with a request from a device to copy data to a destination memory address: based on a page fault, copy the data to a backup page and after determination of a virtual-to-physical address translation, copy the data from the backup page to a destination page identified by the physical address. In some examples, the copy the data to a backup page is based on a page fault and an indication that a target buffer for the data is at or above a threshold level of fullness. In some examples, copying the data to a backup page includes: receive the physical address of the backup page from the device and copy data from the device to the backup page based on identification of the backup page.
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公开(公告)号:US20210288910A1
公开(公告)日:2021-09-16
申请号:US17332815
申请日:2021-05-27
申请人: Intel Corporation
发明人: Daniel DALY , Anjali Singhai JAIN , Chih-Jen CHANG , Edmund CHEN , Robert HATHAWAY , Naru Dames SUNDAR , Pawel SZYMANSKI , John MANGAN
IPC分类号: H04L12/815 , H04L12/851 , H04L12/935
摘要: Examples described herein relate to a network interface device and in some examples, the network interface device includes an Ethernet interface, a host interface, circuitry to be configured to copy a packet payload from a host device through the host interface, form a packet based on the packet payload, and transmit the packet through the Ethernet interface, and circuitry to be configured to apply rate limiting and/or traffic shaping for packets received through the Ethernet interface based on hierarchical quality of service (H-QoS). In some examples, the circuitry is to be configured to apply rate limiting and/or traffic shaping for packets received through the Ethernet interface based on H-QoS comprises a programmable packet processing pipeline that is to be configured to perform one or more of: packet drops of packets received in excess of a receive rate, packet drops based on packet transmission in excess of a transmit rate, and/or traffic shaping of the received packets prior to transmission through one or more output ports. In some examples, to perform packet drops of packets received in excess of a receive rate, the programmable packet processing pipeline is to perform rate limiting per one or more of: class of service, subscriber, service, or interface.
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