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公开(公告)号:US20210343677A1
公开(公告)日:2021-11-04
申请号:US16862287
申请日:2020-04-29
Applicant: Intel Corporation
Inventor: Frederick W. Atadana , Taylor William Gaines , Edvin Cetegen , Wei Li , Hsin-Yu Li , Tony Dambrauskas
Abstract: Disclosed herein are structures and techniques for underfill flow management in electronic assemblies. For example, in some embodiments, an electronic assembly may include a first component, a second component, an underfill on the first component and at least partially between the first component and the second component, and a material at a surface of the first component, wherein the material is outside a footprint of the second component, and the underfill contacts the material with a contact angle greater than 50 degrees.
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公开(公告)号:US11710672B2
公开(公告)日:2023-07-25
申请号:US16504734
申请日:2019-07-08
Applicant: Intel Corporation
Inventor: Taylor William Gaines , Ken Hackenberg , Frederick W. Atadana , Elah Bozorg-Grayeli
IPC: H01L23/10 , H01L23/367 , H01L23/373 , H01L21/50 , H01L21/56 , H01L23/42
CPC classification number: H01L23/10 , H01L21/50 , H01L21/563 , H01L23/367 , H01L23/3736 , H01L23/42 , H01L2924/16152
Abstract: Embodiments may relate to a method of forming a microelectronic package with an integrated heat spreader (IHS). The method may include placing a solder thermal interface material (STIM) layer on a face of a die that is coupled with a package substrate; coupling the IHS with the STIM layer and the package substrate such that the STIM is between the IHS and the die; performing formic acid fluxing of the IHS, STIM layer, and die; and dispensing, subsequent to the formic acid fluxing, sealant on the package substrate around a periphery of the IHS.
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公开(公告)号:US20210013115A1
公开(公告)日:2021-01-14
申请号:US16504734
申请日:2019-07-08
Applicant: Intel Corporation
Inventor: Taylor William Gaines , Ken Hackenberg , Frederick W. Atadana , Elah Bozorg-Grayeli
IPC: H01L23/10 , H01L23/367 , H01L23/373 , H01L21/50
Abstract: Embodiments may relate to a microelectronic package comprising an integrated heat spreader (IHS) coupled with a package substrate. A sealant may be positioned between, and physically coupled to, the IHS and the package substrate. The sealant may at least partially extend from a footprint of the IHS. Other embodiments may be described or claimed.
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公开(公告)号:US11935861B2
公开(公告)日:2024-03-19
申请号:US16862287
申请日:2020-04-29
Applicant: Intel Corporation
Inventor: Frederick W. Atadana , Taylor William Gaines , Edvin Cetegen , Wei Li , Hsin-Yu Li , Tony Dambrauskas
CPC classification number: H01L24/32 , H01L23/293 , H01L23/3157 , H01L24/29 , H01L24/16 , H01L24/73 , H01L2224/16227 , H01L2224/29191 , H01L2224/32225 , H01L2224/73204 , H01L2924/0675 , H01L2924/0715
Abstract: Disclosed herein are structures and techniques for underfill flow management in electronic assemblies. For example, in some embodiments, an electronic assembly may include a first component, a second component, an underfill on the first component and at least partially between the first component and the second component, and a material at a surface of the first component, wherein the material is outside a footprint of the second component, and the underfill contacts the material with a contact angle greater than 50 degrees.
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公开(公告)号:US11935799B2
公开(公告)日:2024-03-19
申请号:US16451973
申请日:2019-06-25
Applicant: Intel Corporation
Inventor: Elah Bozorg-Grayeli , Taylor William Gaines , Frederick W. Atadana , Sergio Antonio Chan Arguedas , Robert F. Cheney
IPC: H01L23/06 , H01L23/053 , H01L23/498 , H01L23/367 , H01L23/42 , H01L25/065
CPC classification number: H01L23/06 , H01L23/053 , H01L23/49816 , H01L23/3672 , H01L23/42 , H01L25/0655
Abstract: Disclosed herein are integrated circuit (IC) package lids with polymer features, as well as related methods and devices. For example, in some embodiments, an IC package may include a package substrate, a lid, and a die between the package substrate and the lid. A foot or rib of the lid may include a polymer material.
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