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公开(公告)号:US20240194544A1
公开(公告)日:2024-06-13
申请号:US18581213
申请日:2024-02-19
发明人: Sang Jae Jang , Weilung Lu , Burt Barber , Adrian Arcedera , Shingo Nakamura
IPC分类号: H01L23/043 , H01L21/50 , H01L21/52 , H01L23/04 , H01L23/055 , H01L23/06 , H01L23/10 , H01L23/16 , H01L23/31 , H01L23/498
CPC分类号: H01L23/043 , H01L21/50 , H01L21/52 , H01L23/04 , H01L23/055 , H01L23/06 , H01L23/10 , H01L23/16 , H01L23/3128 , H01L23/3135 , H01L23/3157 , H01L23/49838
摘要: In one example, a semiconductor device comprises a substrate comprising a top side, a bottom side, and a conductive structure, a body over the top side of the substrate, an electronic component over the top side of the substrate and adjacent to the body, wherein the electronic component comprises an interface element on a top side of the electronic component, a lid over the interface element and a seal between the top side of the electronic component and the lid, and a buffer on the top side of the substrate between the electronic component and the body. Other examples and related methods are also disclosed herein.
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公开(公告)号:US20240178163A1
公开(公告)日:2024-05-30
申请号:US18072026
申请日:2022-11-30
CPC分类号: H01L23/66 , H01L23/06 , H01L23/3107 , H01L24/20 , H01Q5/25 , H01Q9/285 , H01Q13/106 , H01L2223/6677 , H01L2224/221
摘要: An example semiconductor package comprises a semiconductor die having a top surface, a passivation layer over the top surface, a first metal layer on the first passivation layer, an antenna formed in the first metal layer and offset from the semiconductor die, the antenna having a slot bow-tie configuration, a transmission line formed in the first metal layer, the transmission line coupling the semiconductor die to the antenna, and an insulating material separating the first metal layer from a second metal layer, the second metal layer configured to function as a ground reflector for the antenna. The second metal layer may extend below the antenna and the semiconductor die.
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公开(公告)号:US20230360982A1
公开(公告)日:2023-11-09
申请号:US18141634
申请日:2023-05-01
摘要: A method includes: pouring a liquid, semi-liquid or viscous material into a cavity formed by sidewalls of a housing, to cover a substrate that is arranged in the cavity formed by the sidewalls; arranging a lid on the sidewalls, to cover the cavity formed by the sidewalls, the lid including at least one functional element that extends from the lid into the liquid, semi-liquid or viscous material in a direction towards the substrate once the lid is in a final mounting position; and curing the liquid, semi-liquid or viscous material, to form a casting compound.
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公开(公告)号:US20230298953A1
公开(公告)日:2023-09-21
申请号:US17699139
申请日:2022-03-20
申请人: Intel Corporation
发明人: Pouya Talebbeydokhti , Mohan Prashanth Javare Gowda , Sonja Koller , Stephan Stoeckl , Thomas Wagner , Wolfgang Molzer
IPC分类号: H01L23/053 , H01L23/00 , H01L25/10 , H01L23/06 , H01L23/10
CPC分类号: H01L23/053 , H01L24/16 , H01L24/32 , H01L24/73 , H01L25/105 , H01L23/06 , H01L23/10 , H01L2224/73204 , H01L2224/32225 , H01L2224/16227 , H01L2224/16238 , H01L2224/16237 , H01L2924/35121 , H01L2924/37001 , H01L2924/3511 , H01L2924/1611 , H01L2924/16251 , H01L2924/1631 , H01L2924/16315 , H01L2924/1632
摘要: Disclosed herein are microelectronic assemblies, as well as related apparatuses and methods. In some embodiments, a microelectronic assembly may include a substrate; a lid surrounding an individual die, wherein the lid includes a planar portion and two or more sides extending from the planar portion, and wherein the individual die is electrically coupled to the substrate by interconnects; and a material surrounding the interconnects and coupling the two or more sides of the lid to the substrate.
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公开(公告)号:US20230197539A1
公开(公告)日:2023-06-22
申请号:US17644695
申请日:2021-12-16
发明人: David Abraham , John Michael Cotte
IPC分类号: H01L23/049 , H01L23/498 , H01L23/16 , H01L23/13 , H01L23/06 , H01L23/552 , H01L21/52
CPC分类号: H01L23/049 , H01L23/49888 , H01L23/16 , H01L23/13 , H01L23/06 , H01L23/552 , H01L21/52
摘要: Techniques regarding qubit chip assemblies are provided. For example, one or more embodiments described herein can include an apparatus that can comprise a qubit chip positioned on an interposer chip. The apparatus can also comprise an electrical connector in direct contact with the interposer chip. The electrical connector can establish an electrical communication between a wire and a contact pad of the interposer chip that is coupled to the qubit chip.
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公开(公告)号:US20230187323A1
公开(公告)日:2023-06-15
申请号:US17975444
申请日:2022-10-27
发明人: Shinji TADA , Yuma MURATA
IPC分类号: H01L23/495 , H01L23/04 , H01L23/492 , H01L23/06 , H01L23/00
CPC分类号: H01L23/49537 , H01L23/04 , H01L23/06 , H01L23/492 , H01L24/09 , H01L2224/0903
摘要: A semiconductor device, including a case that has a first power terminal including a first bonding area and a second power terminal including a second bonding area, and an insulating unit located between the first power terminal and the second power terminal, and having a shape of a flat plate, the insulating unit being bonded to the case. The insulating unit has a first insulating portion in a sheet form, and a second insulating portion which covers an upper surface, a lower surface, or both the upper and lower surfaces, of the first insulating portion. The first bonding area and the second bonding area are exposed from the insulating unit and from the case.
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7.
公开(公告)号:US20190252212A1
公开(公告)日:2019-08-15
申请号:US16394925
申请日:2019-04-25
发明人: Benoit BESANCON , Alexandre MAS , Karine SAXOD
IPC分类号: H01L21/56 , H01L23/552 , H01L23/053 , H01L21/48 , H01L23/04 , H01L23/31 , H01L23/06 , H01L23/10 , H01L21/52 , H01L23/433 , H01L23/42 , H01L23/24
CPC分类号: H01L21/565 , H01L21/4803 , H01L21/52 , H01L23/04 , H01L23/053 , H01L23/06 , H01L23/10 , H01L23/24 , H01L23/315 , H01L23/3192 , H01L23/42 , H01L23/4334 , H01L23/552 , H01L2224/48091 , H01L2224/73265 , H01L2224/97 , H01L2924/00014
摘要: A method for manufacturing a cover for an electronic package includes placing an insert having opposite faces between opposite faces of a cavity of a mold. A coating material is injected in the mold cavity around the insert. The coating material is then set to form a substrate that is overmolded around the insert and produce the cover.
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公开(公告)号:US20180331050A1
公开(公告)日:2018-11-15
申请号:US15591855
申请日:2017-05-10
发明人: Chia-Liang CHUNG , Pei-Ling LI
IPC分类号: H01L23/66 , H01L23/06 , H01L23/00 , H01L23/552 , H01L21/52 , H01L21/48 , H01L21/683
CPC分类号: H01L23/66 , H01L21/4817 , H01L21/52 , H01L21/568 , H01L21/6835 , H01L23/06 , H01L23/3121 , H01L23/552 , H01L24/13 , H01L24/16 , H01L24/48 , H01L24/49 , H01L2223/6677 , H01L2224/13101 , H01L2224/48091 , H01L2924/00014 , H01L2924/0781 , H01L2924/14 , H01L2924/181 , H01L2924/19105 , H01L2924/3025 , H01L2224/45099 , H01L2924/014 , H01L2924/00012
摘要: The disclosure relates to a semiconductor package device. The semiconductor package device includes a substrate having a first surface and a second surface opposite to the first surface and including a first conductive contact. The semiconductor package device further includes an electronic component disposed on the first surface of the substrate. The semiconductor package device further includes a metal frame disposed on the first surface of the substrate. The semiconductor package device further includes an antenna disposed on the metal frame, wherein the antenna is electrically isolated from the metal frame and electrically connected to the first conductive contact of the substrate.
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公开(公告)号:US09984948B2
公开(公告)日:2018-05-29
申请号:US15586928
申请日:2017-05-04
申请人: ABB Schweiz AG
发明人: David Guillon , Heinz Lendenmann , Hui Huang
IPC分类号: H01L23/29 , H01L23/06 , H01L29/739 , H01L23/31 , H01L23/051
CPC分类号: H01L23/29 , H01L23/051 , H01L23/06 , H01L23/3121 , H01L29/7393 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/8592 , H01L2924/1815 , H01L2924/00014
摘要: A power electronics module includes: a baseplate, a power semiconductor chip arranged on the baseplate, and an encapsulation structure arranged on the baseplate and configured to encapsulate the power semiconductor chip, wherein the encapsulation structure is an epoxy having an elastic modulus in a range of 1 to 20 Giga Pascal, GPa, at room temperature and a coefficient of thermal expansion less than 20 ppm/K.
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公开(公告)号:US20180090407A1
公开(公告)日:2018-03-29
申请号:US15655686
申请日:2017-07-20
IPC分类号: H01L23/10 , H01L23/373 , H01L23/498 , H01L23/04 , H01L23/552 , H01L23/433 , H01L23/06
CPC分类号: H01L23/10 , H01L23/04 , H01L23/06 , H01L23/3675 , H01L23/3736 , H01L23/40 , H01L23/42 , H01L23/433 , H01L23/49816 , H01L23/552 , H01L24/16 , H01L24/32 , H01L24/73 , H01L2224/16227 , H01L2224/32225 , H01L2224/32245 , H01L2224/73204 , H01L2224/73253 , H01L2924/15311 , H01L2924/16251 , H01L2924/3025
摘要: A contact spring for placement in a gap between an electrical substrate opposite a lid (electrically conductive heat spreader) of an electronic device comprises a spring that both conducts heat from the substrate to the lid and electrically connects the substrate and lid. The spring comprises a flat single element configured as a plurality of polygons, providing contact points, the spring substantially lying in a plane and extending substantially in a straight line, or a spiral. The spring in an electronic device such as a flip chip ball grid array having this lid and an electrical substrate with EMI emitters: (1) provides low impedance electrical connection between the electronic circuit and lid; (2) grounds the lid to the electronic circuit; (3) minimizes EMI in the electronic circuit; (4) conducts heat from the electronic circuit to the lid; or any one or combination of the foregoing features (1)-(4).
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