公开(公告)号：US11029927B2

公开(公告)日：2021-06-08

申请号：US16370935

申请日：2019-03-30

Applicant: Intel Corporation

Inventor： Kermin E. ChoFleming, Jr. ,  Jesmin Jahan Tithi ,  Joshua Cranmer ,  Suresh Srinivasan

IPC: G06F8/34 ,  G06F9/448 ,  G06F8/41 ,  G06F15/82

Abstract: Disclosed examples to detect and annotate backedges in data-flow graphs include: a characteristic detector to store a node characteristic identifier in memory in association with a first node of a dataflow graph; a characteristic comparator to compare the node characteristic identifier with a reference criterion; and a backedge identifier generator to generate a backedge identifier indicative of a backedge between the first node and a second node of the dataflow graph based on the comparison, the memory to store the backedge identifier in association with a connection arc between the first and second nodes.

公开(公告)号：US10965536B2

公开(公告)日：2021-03-30

申请号：US16370934

申请日：2019-03-30

Applicant: Intel Corporation

Inventor： Kermin E. ChoFleming, Jr. ,  Jesmin Jahan Tithi ,  Suresh Srinivasan ,  Mahesh A. Iyer

IPC: H04L12/24 ,  H04L12/26 ,  H04L12/861

Abstract: Disclosed examples to insert buffers in dataflow graphs include: a backedge filter to remove a backedge between a first node and a second node of a dataflow graph, the first node representing a first operation of the dataflow graph, the second node representing a second operation of the dataflow graph; a latency calculator to determine a critical path latency of a critical path of the dataflow graph that includes the first node and the second node, the critical path having a longer latency to completion relative to a second path that terminates at the second node; a latency comparator to compare the critical path latency to a latency sum of a buffer latency and a second path latency, the second path latency corresponding to the second path; and a buffer allocator to insert one or more buffers in the second path based on the comparison performed by the latency comparator.

公开(公告)号：US20230367640A1

公开(公告)日：2023-11-16

申请号：US18030057

申请日：2021-04-23

Applicant: Intel Corporation

Inventor： Kermin E. ChoFleming, Jr. ,  Egor A. Kazachkov ,  Daya Shanker Khudia ,  Zakhar A. Matveev ,  Sergey U. Kokljuev ,  Fabrizio Petrini ,  Dmitry S. Petrov ,  Swapna Raj

IPC: G06F9/50 ,  G06F11/30 ,  G06F11/34

CPC classification number: G06F9/5044 ,  G06F11/302 ,  G06F11/3409 ,  G06F2209/509 ,  G06F2201/865

Abstract: An offload analyzer analyzes a program for porting to a heterogenous computing system by identifying code objects for offloading to an accelerator. Runtime metrics generated by executing the program on a host processor unit are provided to an accelerator model that models the performance of the accelerator and generates estimated accelerator metrics for the program. A code object offload selector selects code objects for offloading based on whether estimated accelerated times of the code objects, which comprise estimated accelerator times and offload overhead times, are better than their host processor unit execution times. The code object offload selector selects additional code objects for offloading using a dynamic-programming-like performance estimation approach that performs a bottom-up traversal of a call tree. A heterogeneous version of the program can be generated for execution on the heterogeneous computing system.

公开(公告)号：US11693633B2

公开(公告)日：2023-07-04

申请号：US17341086

申请日：2021-06-07

Applicant: Intel Corporation

Inventor： Kermin E. ChoFleming, Jr. ,  Jesmin Jahan Tithi ,  Joshua Cranmer ,  Suresh Srinivasan

IPC: G06F8/34 ,  G06F9/448 ,  G06F8/41 ,  G06F15/82

CPC classification number: G06F8/34 ,  G06F8/433 ,  G06F8/443 ,  G06F9/4494 ,  G06F15/82

Abstract: Disclosed examples to detect and annotate backedges in data-flow graphs include: a characteristic detector to store a node characteristic identifier in memory in association with a first node of a dataflow graph; a characteristic comparator to compare the node characteristic identifier with a reference criterion; and a backedge identifier generator to generate a backedge identifier indicative of a backedge between the first node and a second node of the dataflow graph based on the comparison, the memory to store the backedge identifier in association with a connection arc between the first and second nodes.