公开(公告)号：US20160292038A1

公开(公告)日：2016-10-06

申请号：US15178142

申请日：2016-06-09

Applicant: Intel Corporation

Inventor： Robert C. Swanson ,  Mariusz Oriol ,  Janusz Jurski ,  Piotr Sawicki ,  Robert W. Cone ,  William J. O'Sullivan ,  Mariusz Stepka ,  Babak Nikjou ,  Madhusudhan Rangarajan ,  Pawel Szymanski ,  Piotr Kwidzinski ,  Robert Bahnsen ,  Mallik Bulusu

IPC: G06F11/14 ,  G06F9/48 ,  G06F1/32

CPC classification number: G06F11/142 ,  G06F1/3296 ,  G06F9/4881 ,  G06F9/5027 ,  G06F9/5088 ,  G06F11/14 ,  G06F11/2023 ,  G06F11/2028 ,  G06F11/203 ,  G06F11/2033 ,  G06F11/2035 ,  G06F11/2043 ,  G06F2201/805 ,  G06F2201/85

Abstract: Technologies for providing manageability redundancy for micro server and clustered System-on-a-Chip (SoC) deployments are presented. A configurable multi-processor apparatus may include multiple integrated circuit (IC) blocks where each IC block includes a task block to perform one or more assignable task functions and a management block to perform management functions with respect to the corresponding IC block. Each task block and each management block may include one or more instruction processors and corresponding memory. Each IC block may be controllable to perform a function of one or more other IC blocks. The IC blocks may communicate with each other via a management communication infrastructure that may include a communication path from each of the management blocks to each of the other management blocks. Via the management communication infrastructure, the management blocks may bridge communication paths between pairs of management blocks.

公开(公告)号：US12259777B2

公开(公告)日：2025-03-25

申请号：US17348435

申请日：2021-06-15

Applicant: Intel Corporation

Inventor： Shen Zhou ,  Xiaoming Du ,  Cong Li ,  Kuljit S. Bains ,  Rajat Agarwal ,  Murugasamy K. Nachimuthu ,  Maciej Lawniczak ,  Chao Yan Tang ,  Mariusz Oriol

IPC: G06F11/07 ,  G11C29/44 ,  G11C29/52

Abstract: A system can predict memory device failure through identification of correctable error patterns based on the memory architecture. The failure prediction can thus account for the circuit-level of the memory rather than the mere number or frequency of correctable errors. A failure prediction engine correlates hardware configuration of the memory device with correctable errors (CEs) detected in data of the memory device to predict an uncorrectable error (UE) based on the correlation.

公开(公告)号：US11573830B2

公开(公告)日：2023-02-07

申请号：US17442041

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Katalin Klara Bartfai-Walcott ,  Arkadiusz Berent ,  Vasuki Chilukuri ,  Mark Baldwin ,  Vasudevan Srinivasan ,  Vinila Rose ,  Mariusz Oriol ,  Justyna Chilczuk ,  Bartosz Gotowalski

IPC: G06F9/50 ,  G06F21/73 ,  G06F21/10 ,  G06F21/72 ,  G06Q20/12 ,  G06Q10/10 ,  G06Q30/06 ,  G06Q50/18 ,  H04L9/08 ,  H04L9/32 ,  G06Q30/00 ,  G06Q50/04

Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement and manage software defined silicon products are disclosed. Example semiconductor devices disclosed herein include circuitry configurable to provide one or more features. Disclosed example semiconductor devices also include a license processor to activate or deactivate at least one of the one or more features based on a license received via a network from a first remote enterprise system. Disclosed example semiconductor devices further include an analytics engine to report telemetry data associated with operation of the semiconductor device to at least one of the first remote enterprise system or a second remote enterprise system, the analytics engine to report the telemetry data in response to activation or deactivation of the at least one of the one or more features based on the license.

公开(公告)号：US20240095315A1

公开(公告)日：2024-03-21

申请号：US18474081

申请日：2023-09-25

Applicant: Intel Corporation

Inventor： Katalin Bartfai-Walcott ,  Mariusz Oriol ,  Vasudevan Srinivasan ,  Peggy Irelan ,  Mariusz Stepka ,  Kaitlin Murphy ,  Bharat Pillilli ,  Mark Baldwin ,  Mateusz Bronk ,  Fariaz Karim ,  Arkadiusz Berent ,  Vasuki Chilukuri

IPC: G06F21/10 ,  G06F9/455

CPC classification number: G06F21/107 ,  G06F9/45558 ,  G06F2009/4557

Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement license management solutions for software defined silicon (SDSi) products are disclosed. Example license management solutions disclosed herein include, but are not limited to, virtual resource migration using SDSi, resource configuration management using SDSi, hardware self-configuration using SDSi, reduced footprint agents using SDSi, performing SDSi usage evaluation and corresponding license transfer responsive to detected and/or predicted failures, transferring node locked SDSi licenses, transfer of SDSi licenses without a trusted license server, community license generation, expirable SDSi licenses via a reliable clock, non-node locked licenses via blockchain, and activating hardware features with a pre-generated hardware license.

公开(公告)号：US20210012445A1

公开(公告)日：2021-01-14

申请号：US17033200

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Katalin Klara Bartfai-Walcott ,  Mark Baldwin ,  Arkadiusz Berent ,  Bartosz Gotowalski ,  Vasuki Chilukuri ,  Vasudevan Srinivasan ,  Justyna Chilczuk ,  Vinila Rose ,  Mariusz Oriol

IPC: G06Q50/18 ,  G06Q30/00 ,  G06Q30/06 ,  G06Q10/10 ,  H04L9/08 ,  H04L9/32

Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement software defined silicon feature licensing are disclosed. Example licensor systems disclosed herein includes a third party verifier to verify one or more credentials included in a request to become an authorized delegated licensor, the request received from a third party. Disclosed example licensor systems also include a feature identifier to identify a feature of a silicon structure which the third party is to be granted the authority to license. Disclosed example licensor systems further include a configuration installation code generator to generate feature configuration installation code, the feature configuration installation code to be used by the third party to generate at least a portion of the license, the portion of the license to be used by a licensee to configure the silicon structure to access the licensed feature, and contents of the feature configuration installation code encrypted to prevent access by the authorized delegated licensor.

公开(公告)号：US20170289300A1

公开(公告)日：2017-10-05

申请号：US15084377

申请日：2016-03-29

Applicant: Intel Corporation

Inventor： Justin J. Song ,  Devadatta V. Bodas ,  Muralidhar Rajappa ,  Andy Hoffman ,  Mariusz Oriol ,  Gopal Mundada

IPC: H04L29/08 ,  H04L29/06

CPC classification number: H04L63/08 ,  G06F1/3203 ,  G06F21/554 ,  H04L41/04 ,  H04L41/24

Abstract: A method and apparatus for coordinating and authenticating requests for data. In one embodiment, the apparatus comprises: a baseboard management controller (BMC); and a request coordinator coupled to the BMC to intercept BMC requests and to provide intercepted requests to the BMC, where the coordination interface comprises a request parser to parse parameters for each of the BMC requests, one or more queues to store the requests while the BMC is servicing another BMC request, and a command submitter to send individual BMC requests to the BMC, wherein the BMC is operable to generate the responses to the BMC requests received from the coordination interface and to send the responses to the coordination interface.

公开(公告)号：US12061930B2

公开(公告)日：2024-08-13

申请号：US17033200

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Katalin Klara Bartfai-Walcott ,  Mark Baldwin ,  Arkadiusz Berent ,  Bartosz Gotowalski ,  Vasuki Chilukuri ,  Vasudevan Srinivasan ,  Justyna Chilczuk ,  Vinila Rose ,  Mariusz Oriol

IPC: G06Q10/10 ,  G06F9/50 ,  G06F21/10 ,  G06F21/72 ,  G06F21/73 ,  G06Q20/12 ,  G06Q30/018 ,  G06Q30/0601 ,  G06Q50/04 ,  G06Q50/18 ,  H04L9/08 ,  H04L9/32

CPC classification number: G06F9/5027 ,  G06F21/105 ,  G06F21/72 ,  G06F21/73 ,  G06Q10/10 ,  G06Q20/1235 ,  G06Q20/127 ,  G06Q30/0609 ,  G06Q50/184 ,  H04L9/0861 ,  H04L9/321 ,  H04L9/3263 ,  H04L9/3268 ,  G05B2219/2205 ,  G05B2219/25395 ,  G05B2219/33088 ,  G06F21/1011 ,  G06F2209/501 ,  G06F2209/504 ,  G06F2209/506 ,  G06F2221/2149 ,  G06Q30/0185 ,  G06Q50/04 ,  G06Q2220/18 ,  H04L9/3278

Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement software defined silicon feature licensing are disclosed. Example licensor systems disclosed herein includes a third party verifier to verify one or more credentials included in a request to become an authorized delegated licensor, the request received from a third party. Disclosed example licensor systems also include a feature identifier to identify a feature of a silicon structure which the third party is to be granted the authority to license. Disclosed example licensor systems further include a configuration installation code generator to generate feature configuration installation code, the feature configuration installation code to be used by the third party to generate at least a portion of the license, the portion of the license to be used by a licensee to configure the silicon structure to access the licensed feature, and contents of the feature configuration installation code encrypted to prevent access by the authorized delegated licensor.

公开(公告)号：US11960439B2

公开(公告)日：2024-04-16

申请号：US17690950

申请日：2022-03-09

Applicant: Intel Corporation

Inventor： Janusz Jurski ,  Myron Loewen ,  Mariusz Oriol ,  Patrick Schoeller ,  Jerry Backer ,  Richard Marian Thomaiyar ,  Eliel Louzoun ,  Piotr Matuszczak

IPC: G06F15/82 ,  G06F21/62

CPC classification number: G06F15/82 ,  G06F21/6218

Abstract: Methods and apparatus for scalable MCTP infrastructure. A system is split into independent MCTP domains, wherein each MCTP domain uses Endpoint Identifiers (EIDs) for endpoint devices within the MCTP domain in a manner similar to conventional MCTP operations. A new class of MCTP devices (referred to as a Domain Controllers) is provided to enable inter-domain communication and communication with global devices. Global traffic originators or receivers like a BMC (Baseboard Management Controller), Infrastructure Processing Unit (IPU), Smart NIC (Network Interface Card), Debugger, or PROT (Platform Root or Trust) discover and establish two-way communication through the Domain Controllers to any of the devices in the target domain(s). The Domain Controllers are configured to implement tunneled connections between global devices and domain endpoint devices. The tunneled connections may employ encapsulated messages with outer and inner headers and/or augmented MCTP messages with repurposed fields used to store source and destination EIDs.

公开(公告)号：US20240291786A1

公开(公告)日：2024-08-29

申请号：US18660020

申请日：2024-05-09

Applicant: Intel Corporation

Inventor： Janusz P. Jurski ,  Mariusz Oriol ,  Filip Schmole

IPC: H04L51/21 ,  H04L45/02

CPC classification number: H04L51/21 ,  H04L45/02

Abstract: A management control message is received to be routed from a first device to a second device in a system. The management control message is determined to include management control data. It is determined whether the second device supports such management control messages and it is determined whether to forward the management control message to the second device based on whether the second device supports management control messages. Management control messages are routed to destination devices within the system over a bridge device associated with the management control messages.

公开(公告)号：US20220092154A1

公开(公告)日：2022-03-24

申请号：US17442041

申请日：2020-09-25

Applicant: Intel Corporation

Inventor： Katalin Klara Bartfai-Walcott ,  Arkadiusz Berent ,  Vasuki Chilukuri ,  Mark Baldwin ,  Vasudevan Srinivasan ,  Vinila Rose ,  Mariusz Oriol ,  Justyna Chilczuk ,  Bartosz Gotowalski

IPC: G06F21/10 ,  G06Q30/00 ,  H04L9/32 ,  G06Q50/04

Abstract: Methods, apparatus, systems and articles of manufacture (e.g., physical storage media) to implement and manage software defined silicon products are disclosed. Example semiconductor devices disclosed herein include circuitry configurable to provide one or more features. Disclosed example semiconductor devices also include a license processor to activate or deactivate at least one of the one or more features based on a license received via a network from a first remote enterprise system. Disclosed example semiconductor devices further include an analytics engine to report telemetry data associated with operation of the semiconductor device to at least one of the first remote enterprise system or a second remote enterprise system, the analytics engine to report the telemetry data in response to activation or deactivation of the at least one of the one or more features based on the license.