Abstract:
A method and apparatus for unified concurrency control in a Software Transactional Memory (STM) is herein described. A transaction record associated with a memory address referenced by a transactional memory access operation includes optimistic and pessimistic concurrency control fields. Access barriers and other transactional operations/functions are utilized to maintain both fields of the transaction record, appropriately. Consequently, concurrent execution of optimistic and pessimistic transactions is enabled.
Abstract:
Disclosed examples to perform instruction-level graphics processing unit (GPU) profiling based on binary instrumentation include: accessing, via a GPU driver executed by a processor, binary code generated by a GPU compiler based on application programming interface (API)-based code provided by an application; accessing, via the GPU driver executed by the processor, instrumented binary code, the instrumented binary code generated by a binary instrumentation module that inserts profiling instructions in the binary code based on an instrumentation schema provided by a profiling application; and providing, via the GPU driver executed by the processor, the instrumented binary code from the GPU driver to a GPU, the instrumented binary code structured to cause the GPU to collect and store profiling data in a memory based on the profiling instructions while executing the instrumented binary code.
Abstract:
Disclosed examples include generating instrumented code by inserting profiling instructions at insertion points in code; outputting the instrumented code for execution by second programmable circuitry; and accessing profiling data generated by the second programmable circuitry based on the instrumented code.
Abstract:
Disclosed examples to perform instruction-level graphics processing unit (GPU) profiling based on binary instrumentation include: accessing, via a GPU driver executed by a processor, binary code generated by a GPU compiler based on application programming interface (API)-based code provided by an application; accessing, via the GPU driver executed by the processor, instrumented binary code, the instrumented binary code generated by a binary instrumentation module that inserts profiling instructions in the binary code based on an instrumentation schema provided by a profiling application; and providing, via the GPU driver executed by the processor, the instrumented binary code from the GPU driver to a GPU, the instrumented binary code structured to cause the GPU to collect and store profiling data in a memory based on the profiling instructions while executing the instrumented binary code.
Abstract:
Systems, apparatuses and methods may provide for technology that receives compiled code and identifies a plurality of blocks in the compiled code. Instrumented code may be generated from the compiled code by modifying the blocks to include probes to measure latencies of the blocks during execution of the instrumented code on a graphics processing unit.
Abstract:
Systems, apparatuses and methods may provide for technology that receives compiled code and identifies a plurality of blocks in the compiled code. Instrumented code may be generated from the compiled code by modifying the blocks to include probes to measure latencies of the blocks during execution of the instrumented code on a graphics processing unit.