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公开(公告)号:US10895792B2
公开(公告)日:2021-01-19
申请号:US16711544
申请日:2019-12-12
Applicant: Japan Display Inc.
Inventor: Yohei Yamaguchi , Arichika Ishida , Hidekazu Miyake , Hiroto Miyake , Isao Suzumura
IPC: H01L27/12 , H01L29/786 , G02F1/1368 , G02F1/1362 , G02F1/1343 , H01L29/423
Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.
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公开(公告)号:US09772536B2
公开(公告)日:2017-09-26
申请号:US15444379
申请日:2017-02-28
Applicant: Japan Display Inc.
Inventor: Yohei Yamaguchi , Arichika Ishida , Hidekazu Miyake , Hiroto Miyake , Isao Suzumura
IPC: G02F1/1362 , H01L29/786 , H01L27/12 , G02F1/1368 , G02F1/1343 , H01L29/423
CPC classification number: G02F1/1368 , G02F1/134309 , G02F1/13439 , G02F1/136209 , G02F1/136227 , G02F2001/136218 , G02F2001/13685 , G02F2202/10 , H01L27/1225 , H01L29/42384 , H01L29/78633 , H01L29/7869
Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.
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公开(公告)号:US20170168334A1
公开(公告)日:2017-06-15
申请号:US15444379
申请日:2017-02-28
Applicant: Japan Display Inc.
Inventor: Yohei Yamaguchi , Arichika Ishida , Hidekazu Miyake , Hiroto Miyake , Isao Suzumura
IPC: G02F1/1368 , G02F1/1362 , G02F1/1343
CPC classification number: G02F1/1368 , G02F1/134309 , G02F1/13439 , G02F1/136209 , G02F1/136227 , G02F2001/136218 , G02F2001/13685 , G02F2202/10 , H01L27/1225 , H01L29/42384 , H01L29/78633 , H01L29/7869
Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.
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公开(公告)号:US11921392B2
公开(公告)日:2024-03-05
申请号:US17945214
申请日:2022-09-15
Applicant: Japan Display Inc.
Inventor: Yohei Yamaguchi , Arichika Ishida , Hidekazu Miyake , Hiroto Miyake , Isao Suzumura
IPC: G02F1/1368 , G02F1/1343 , G02F1/1362 , H01L27/12 , H01L29/423 , H01L29/786
CPC classification number: G02F1/1368 , G02F1/134309 , G02F1/13439 , G02F1/136209 , G02F1/136227 , H01L27/1225 , H01L29/78633 , H01L29/7869 , G02F1/136218 , G02F1/13685 , G02F2202/10 , H01L29/42384
Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.
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公开(公告)号:US11474406B2
公开(公告)日:2022-10-18
申请号:US17126112
申请日:2020-12-18
Applicant: Japan Display Inc.
Inventor: Yohei Yamaguchi , Arichika Ishida , Hidekazu Miyake , Hiroto Miyake , Isao Suzumura
IPC: G02F1/1368 , G02F1/1362 , H01L27/12 , H01L29/786 , G02F1/1343 , H01L29/423
Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, a first metal layer on the insulating substrate, a first insulating layer on the insulating substrate and the first metal layer, a semiconductor layer on the first insulating layer, a second insulating layer on the semiconductor layer and the first insulating layer, a second metal layer on the second insulating layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer. The first metal layer overlaps the second metal layer. A third metal layer contacts a top surface of the second metal layer and a top surface of the first metal layer.
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公开(公告)号:US20180364509A1
公开(公告)日:2018-12-20
申请号:US16109834
申请日:2018-08-23
Applicant: Japan Display Inc.
Inventor: Yohei Yamaguchi , Arichika Ishida , Hidekazu Miyake , Hiroto Miyake , Isao Suzumura
IPC: G02F1/1368 , G02F1/1343 , G02F1/1362 , H01L27/12 , H01L29/786 , H01L29/423
CPC classification number: G02F1/1368 , G02F1/134309 , G02F1/13439 , G02F1/136209 , G02F1/136227 , G02F2001/136218 , G02F2001/13685 , G02F2202/10 , H01L27/1225 , H01L29/42384 , H01L29/78633 , H01L29/7869
Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.
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公开(公告)号:US10088728B2
公开(公告)日:2018-10-02
申请号:US15662385
申请日:2017-07-28
Applicant: Japan Display Inc.
Inventor: Yohei Yamaguchi , Arichika Ishida , Hidekazu Miyake , Hiroto Miyake , Isao Suzumura
IPC: G02F1/1362 , H01L29/786 , H01L27/12 , G02F1/1368 , G02F1/1343 , H01L29/423
Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.
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公开(公告)号:US09964824B2
公开(公告)日:2018-05-08
申请号:US14793106
申请日:2015-07-07
Applicant: Japan Display Inc.
Inventor: Isao Suzumura , Arichika Ishida , Norihiro Uemura , Hidekazu Miyake , Hiroto Miyake , Yohei Yamaguchi
IPC: G09G3/36 , G02F1/1368 , G02F1/1333 , G02F1/1362 , H01L27/12
CPC classification number: G02F1/1368 , G02F1/133345 , G02F1/136227 , H01L27/1288
Abstract: According to one embodiment, a display device includes a TFT on an insulating substrate. The TFT includes a gate electrode, an insulating layer on the gate electrode, a semiconductor layer on the insulating layer, and a source electrode and a drain electrode each provided in contact with at least a part of the semiconductor layer. The source and drain electrodes have a laminated structure including a lower layer, an intermediate layer and an upper layer. The source and drain electrodes include sidewalls each including a first tapered portion on the upper layer side, a second tapered portion on the lower layer side and a sidewall protective film attached to the second tapered portion. The taper angle of the first tapered portion is smaller than that of the second tapered portion.
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公开(公告)号:US10539846B2
公开(公告)日:2020-01-21
申请号:US16109834
申请日:2018-08-23
Applicant: Japan Display Inc.
Inventor: Yohei Yamaguchi , Arichika Ishida , Hidekazu Miyake , Hiroto Miyake , Isao Suzumura
IPC: G02F1/1368 , G02F1/1362 , H01L27/12 , H01L29/786 , G02F1/1343 , H01L29/423
Abstract: According to one embodiment, a display device includes an insulating substrate, a thin-film transistor including a semiconductor layer formed on a layer above the insulating substrate, a gate electrode which at least partly overlaps the semiconductor layer, and a first electrode and a second electrode which are electrically connected to the semiconductor layer, and a light shielding layer formed between the thin-film transistor and the insulating substrate to at least partly overlap the semiconductor layer, the light shielding layer electrically connected to the gate electrode.
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公开(公告)号:US20160027921A1
公开(公告)日:2016-01-28
申请号:US14804395
申请日:2015-07-21
Applicant: Japan Display Inc.
Inventor: Hidekazu MIYAKE , Arichika Ishida , Norihiro Uemura , Hiroto Miyake , Isao Suzumura , Yohei Yamaguchi
IPC: H01L29/786 , H01L29/24 , G02F1/1368 , H01L27/12
CPC classification number: H01L29/7869 , G02F1/1368 , G02F2001/13685 , G02F2202/104 , H01L27/1218 , H01L27/1225 , H01L29/24 , H01L29/66969 , H01L29/78696
Abstract: According to one embodiment, a display device includes thin-film transistor. The thin-film transistor includes a first semiconductor layer, a first insulating film, a gate electrode, a second insulating film, a second semiconductor layer, a first electrode and a second electrode. The gap between the bottom surface of the gate electrode and the upper surface of the first channel region of the first semiconductor layer is larger than the gap between the upper surface of the gate electrode and the bottom surface of the second channel region of the second semiconductor layer.
Abstract translation: 根据一个实施例,显示装置包括薄膜晶体管。 薄膜晶体管包括第一半导体层,第一绝缘膜,栅电极,第二绝缘膜,第二半导体层,第一电极和第二电极。 栅电极的底表面和第一半导体层的第一沟道区的上表面之间的间隙大于栅电极的上表面和第二半导体的第二沟道区的底表面之间的间隙 层。
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