Method of fabricating mixed-mode device
    1.
    发明授权
    Method of fabricating mixed-mode device 有权
    混合模式装置的制作方法

    公开(公告)号:US6030872A

    公开(公告)日:2000-02-29

    申请号:US241545

    申请日:1999-02-01

    IPC分类号: H01L21/8234 H01L21/336

    CPC分类号: H01L21/823462 Y10S438/981

    摘要: A method for fabricating a mixed-mode device. A first gate oxide layer and a second gate oxide layer are formed. The polysilicon layer is used as a mask to pattern the gate oxide layers. Additionally, a top electrode is formed during the first gate oxide layer is patterned. A bottom electrode is formed during the second gate oxide layer is patterned. The first gate oxide layer and the second gate oxide layer are formed by a single oxidation operation, thus thicknesses of the first gate oxide layer and the second oxide layer can be effectively controlled.

    摘要翻译: 一种混合模式装置的制造方法。 形成第一栅极氧化物层和第二栅极氧化物层。 多晶硅层用作掩模以对栅极氧化物层进行图案化。 此外,在第一栅极氧化物层被图案化时形成顶部电极。 在第二栅极氧化层被图案化时形成底部电极。 第一栅极氧化物层和第二栅极氧化物层通过单次氧化操作形成,从而能够有效地控制第一栅极氧化物层和第二氧化物层的厚度。

    Field effect transistor without spacer mask edge defects
    3.
    发明授权
    Field effect transistor without spacer mask edge defects 失效
    场效应晶体管,无间隔掩模边缘缺陷

    公开(公告)号:US5482876A

    公开(公告)日:1996-01-09

    申请号:US450266

    申请日:1995-05-25

    摘要: A field effect transistor which is not susceptible to mask edge defects at its gate spacer oxides. The transistor is formed upon a (100) silicon semiconductor substrate through successive layering of a gate oxide, and a gate electrode. A pair of gate spacer oxides is then formed covering opposite edges of the gate oxide and the gate electrode. A screen oxide is then formed over the surface of the semiconductor substrate, the gate and the gate spacer oxides. The upper surface of the screen oxide has an angle of elevation not exceeding 54.44 degrees with respect to the semiconductor substrate. The screen oxide also smoothly flows from thicker regions at the junctures of the gate spacer oxides and the semiconductor substrate to thinner regions over the surface of the semiconductor substrate. The semiconductor substrate adjoining the gate spacer oxides is then ion implanted through the screen oxide to form amorphous source/drain electrodes. The penetration depth of the ion implant is greater than the thickness of the thinner regions of the screen oxide and no greater than the thickness of the thicker regions of the screen oxide. Finally, the amorphous source/drain electrodes are annealed. In a second embodiment, a dopes glass screen layer is used in place of the screen oxide layer. The glass layer must be removed prior to annealing the amorphous source/drain electrodes.

    摘要翻译: 场效应晶体管,其栅极间隔氧化物不易受掩模边缘缺陷的影响。 晶体管通过栅极氧化物和栅极电极的连续分层形成在(100)硅半导体衬底上。 然后形成一对栅极间隔氧化物,覆盖栅极氧化物和栅电极的相对边缘。 然后在半导体衬底,栅极和栅极间隔物氧化物的表面上形成屏幕氧化物。 屏幕氧化物的上表面相对于半导体衬底具有不超过54.44度的仰角。 屏蔽氧化物也从栅极间隔物氧化物和半导体衬底的接合处的较厚区域平滑地流过半导体衬底的表面上较薄的区域。 然后,与栅极间隔物氧化物相邻的半导体衬底通过荧光体氧化物离子注入,以形成无定形源/漏电极。 离子注入的穿透深度大于屏幕氧化物的较薄区域的厚度,并且不大于屏幕氧化物较厚区域的厚度。 最后,对非晶态/漏极进行退火。 在第二实施例中,使用掺杂玻璃屏幕层代替屏幕氧化物层。 必须在退火非晶态/漏极之前去除玻璃层。

    Method for observing tungsten plug of semiconductor device
microscopically
    4.
    发明授权
    Method for observing tungsten plug of semiconductor device microscopically 失效
    微观观察半导体器件钨丝塞的方法

    公开(公告)号:US5989930A

    公开(公告)日:1999-11-23

    申请号:US805678

    申请日:1997-02-27

    IPC分类号: G01N1/28 G01R21/00

    CPC分类号: G01N1/28

    摘要: A method of observing a tungsten plug of a semiconductor device using a microscope includes cutting the semiconductor device at the center of the tungsten plug. The semiconductor device is then stained with a reagent which includes hydrogen peroxide and ammonia and etched with a solution containing hydrofluoric acid. The fine structure of the grain of the tungsten plug of the semiconductor device is then observed with a microscope.

    摘要翻译: 使用显微镜观察半导体器件的钨插塞的方法包括在钨插塞的中心切割半导体器件。 然后用包含过氧化氢和氨的试剂对该半导体器件进行染色,并用含有氢氟酸的溶液进行蚀刻。 然后用显微镜观察半导体器件的钨插棒的晶粒的精细结构。