公开(公告)号：US12147333B2

公开(公告)日：2024-11-19

申请号：US18303863

申请日：2023-04-20

Applicant: KIOXIA CORPORATION

Inventor： Shinichi Kanno ,  Naoki Esaka

IPC: G06F12/02 ,  G06F12/08 ,  G06F12/0868 ,  G06F12/0871 ,  G06F13/16 ,  G06F13/40

Abstract: According to one embodiment, a controller of a memory system writes write data associated with a set of received write requests to a first write destination storage region in a first write mode of writing a plurality of bits per memory cell, without writing the write data to a second storage region. When receiving from a host a first request to cause a state of the first write destination storage region to transition to a second state in which writing is suspended, the controller transfers un-transferred remaining write data from a write buffer of the host to an internal buffer, and writes the remaining write data to the second storage region in a second write mode of writing 1 bit per memory cell.

公开(公告)号：US11899962B2

公开(公告)日：2024-02-13

申请号：US17653393

申请日：2022-03-03

Applicant: Kioxia Corporation

Inventor： Naoki Esaka ,  Koichi Nagai ,  Toyohide Isshi

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

Abstract: According to one embodiment, an information processing apparatus includes a nonvolatile memory and a CPU. The CPU stores first data in the nonvolatile memory, performs a first transmission of a write request associated with the first data to the memory system, and stores management data including information equivalent to the write request in the nonvolatile memory. In response to receiving a first response to the write request transmitted in the first transmission, the CPU adds, to the management data, information indicating that the first response has been received. The CPU deletes the first data and the management data in response to receiving a second response to the write request transmitted in the first transmission after receiving the first response.

公开(公告)号：US11861202B2

公开(公告)日：2024-01-02

申请号：US17468163

申请日：2021-09-07

Applicant: Kioxia Corporation

Inventor： Naoki Esaka ,  Shinichi Kanno

IPC: G06F3/06

CPC classification number: G06F3/0644 ,  G06F3/0604 ,  G06F3/0659 ,  G06F3/0679

Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller receives a first write request associated with first data from a host. In response to a lapse of first time since the reception of the first write request, the controller starts a write process of second data to the nonvolatile memory. The second data includes at least the first data. The controller transmits a first response to the first write request to the host in response to completion of the write process. The first time is time obtained by subtracting second time from third time designated by the host as a time limit of the transmission of the first response since the reception of the first write request.

公开(公告)号：US12223178B2

公开(公告)日：2025-02-11

申请号：US17939150

申请日：2022-09-07

Applicant: Kioxia Corporation

Inventor： Koichi Nagai ,  Naoki Esaka ,  Toyohide Isshi

IPC: G06F3/06

Abstract: According to one embodiment, an information processing apparatus includes a nonvolatile memory and a CPU. The CPU stores, to the nonvolatile memory, first data, and management data including information equivalent to a write command associated with the first data and designating a first LBA range, and performs a first transmission of the write command to a memory system. When writing of second data to a second LBA range including a third LBA range that is at least a portion of the first LBA range or deallocation of the second LBA range is requested before a second response to the write command is received, the CPU transmits, to the system, a command to cancel writing to at least the third LBA range from writing of the first data to the first LBA range in accordance with the write command.

公开(公告)号：US11816344B2

公开(公告)日：2023-11-14

申请号：US17468880

申请日：2021-09-08

Applicant: Kioxia Corporation

Inventor： Naoki Esaka

IPC: G06F3/06

CPC classification number: G06F3/0644 ,  G06F3/0604 ,  G06F3/0616 ,  G06F3/0622 ,  G06F3/0659 ,  G06F3/0679

Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller manages at least one storage area that is obtained by logically dividing a storage space of the nonvolatile memory. One or more storage areas in the at least one storage area store one or more data pieces, respectively. The controller manages first information on one or more times in which integrity of the one or more data pieces have been confirmed last, respectively.

公开(公告)号：US11762580B2

公开(公告)日：2023-09-19

申请号：US17684551

申请日：2022-03-02

Applicant: Kioxia Corporation

Inventor： Hideki Yoshida ,  Shinichi Kanno ,  Naoki Esaka

IPC: G06F3/06

CPC classification number: G06F3/0656 ,  G06F3/0604 ,  G06F3/0679

Abstract: A controller manages a plurality of block groups each including one or more blocks among a plurality of blocks provided in a non-volatile memory. The controller assigns one of the plurality of block groups to each of plurality of zones. The controller writes write data which is to be written to a first zone to a shared write buffer and writes write data which is to be written to a second zone to the shared write buffer. When a total size of the write data in the first zone stored in the shared write buffer reaches a capacity of the first zone, the controller copies the write data in the first zone stored in the shared write buffer to the first block group assigned to the first zone.

公开(公告)号：US11543997B2

公开(公告)日：2023-01-03

申请号：US17406619

申请日：2021-08-19

Applicant: Kioxia Corporation

Inventor： Shinichi Kanno ,  Hideki Yoshida ,  Naoki Esaka ,  Hiroshi Nishimura

IPC: G06F3/06 ,  G06F12/1009

Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.

公开(公告)号：US12229441B2

公开(公告)日：2025-02-18

申请号：US18499750

申请日：2023-11-01

Applicant: KIOXIA CORPORATION

Inventor： Shinichi Kanno ,  Hideki Yoshida ,  Naoki Esaka ,  Hiroshi Nishimura

IPC: G06F3/06 ,  G06F12/1009

Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller acquires, from a host, write data having the same first size as a data write unit of the nonvolatile memory and obtained by dividing write data associated with one write command having a first identifier indicating a first write destination block in a plurality of write destination blocks into a plurality of write data or combining write data associated with two or more write commands having the first identifier. The controller writes the acquired write data having the first size to the first write destination block by a first write operation.

公开(公告)号：US12175121B2

公开(公告)日：2024-12-24

申请号：US18365617

申请日：2023-08-04

Applicant: Kioxia Corporation

Inventor： Hideki Yoshida ,  Shinichi Kanno ,  Naoki Esaka

IPC: G06F3/06

Abstract: A controller manages a plurality of block groups each including one or more blocks among a plurality of blocks provided in a non-volatile memory. The controller assigns one of the plurality of block groups to each of plurality of zones. The controller writes write data which is to be written to a first zone to a shared write buffer and writes write data which is to be written to a second zone to the shared write buffer. When a total size of the write data in the first zone stored in the shared write buffer reaches a capacity of the first zone, the controller copies the write data in the first zone stored in the shared write buffer to the first block group assigned to the first zone.

公开(公告)号：US12124735B2

公开(公告)日：2024-10-22

申请号：US18333962

申请日：2023-06-13

Applicant: KIOXIA CORPORATION

Inventor： Shinichi Kanno ,  Hideki Yoshida ,  Naoki Esaka

IPC: G06F3/06 ,  G06F12/0804

CPC classification number: G06F3/0656 ,  G06F3/0604 ,  G06F3/0679 ,  G06F12/0804

Abstract: According to one embodiment, a memory system receives from a host a first write request including a first block identifier designating a first write destination block to which first write data is to be written. The memory system acquires the first write data from a write buffer temporarily holding write data corresponding to each of the write requests, and writes the first write data to a write destination page in the first write destination block. The memory system releases a region in the write buffer, storing data which is made readable from the first write destination block by writing the first write data to the write destination page. The data made readable is a data of a page in the first write destination block preceding the write destination page.