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公开(公告)号:US11797436B2
公开(公告)日:2023-10-24
申请号:US17499825
申请日:2021-10-12
Applicant: KIOXIA CORPORATION
Inventor: Shinichi Kanno , Hideki Yoshida
CPC classification number: G06F12/0246 , G06F3/064 , G06F3/067 , G06F3/0616 , G06F3/0652 , G06F3/0659 , G06F3/0679 , G06F3/0688 , G06F12/0253
Abstract: According to one embodiment, a memory system determine both of a first block to which data from a host is to be written and a first location of the first block, when receiving a write request to designate a first logical address from the host. The memory system writes the data from the host to the first location of the first block. The memory system notifies the host of the first logical address, a first block number designating the first block, and a first in-block offset indicating an offset from a leading part of the first block to the first location by a multiple of grain having a size different from a page size.
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公开(公告)号:US20230315294A1
公开(公告)日:2023-10-05
申请号:US18329446
申请日:2023-06-05
Applicant: Kioxia Corporation
Inventor: Hideki Yoshida , Shinichi Kanno
IPC: G06F3/06 , G06F12/1009 , G06F12/02
CPC classification number: G06F3/061 , G06F3/0616 , G06F3/064 , G06F3/0658 , G06F3/0688 , G06F12/0246 , G06F12/1009 , G06F2212/1016 , G06F2212/1024 , G06F2212/1036 , G06F2212/2022 , G06F2212/7201 , G06F2212/7205 , G06F2212/7207 , G06F2212/7208
Abstract: According to one embodiment, when receiving a write request to designate a first block number and a first logical address from a host, a memory system determines a first location in a first block having the first block number, to which data from the host is to be written, and writes the data from the host to the first location of the first block. The memory system updates a first address translation table managing mapping between logical addresses and in-block physical addresses of the first block, and maps a first in-block physical address indicative of the first location to the first logical address.
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3.
公开(公告)号:US11704019B2
公开(公告)日:2023-07-18
申请号:US17078547
申请日:2020-10-23
Applicant: Kioxia Corporation
Inventor: Shinichi Kanno , Hiroshi Nishimura , Hideki Yoshida , Hiroshi Murayama
CPC classification number: G06F3/0604 , G06F1/3275 , G06F3/0619 , G06F3/0653 , G06F3/0655 , G06F3/0659 , G06F3/0679 , G06F3/0688 , G06F11/1068 , G11C29/52 , H03M13/2906 , G06F12/0246 , G06F2212/214 , G11C16/0483 , G11C16/24 , Y02D10/00
Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a controller which controls the nonvolatile memory. The controller notifies to an outside an extensive signal which indicates a predetermined state of the nonvolatile memory or the controller.
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公开(公告)号:US12153516B2
公开(公告)日:2024-11-26
申请号:US18367547
申请日:2023-09-13
Applicant: Kioxia Corporation
Inventor: Shinichi Kanno , Hideki Yoshida
Abstract: According to one embodiment, a memory system determine both of a first block to which data from a host is to be written and a first location of the first block, when receiving a write request to designate a first logical address from the host. The memory system writes the data from the host to the first location of the first block. The memory system notifies the host of the first logical address, a first block number designating the first block, and a first in-block offset indicating an offset from a leading part of the first block to the first location by a multiple of grain having a size different from a page size.
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5.
公开(公告)号:US12131024B2
公开(公告)日:2024-10-29
申请号:US18204854
申请日:2023-06-01
Applicant: Kioxia Corporation
Inventor: Shinichi Kanno , Hiroshi Nishimura , Hideki Yoshida , Hiroshi Murayama
CPC classification number: G06F3/0604 , G06F1/3275 , G06F3/0619 , G06F3/0653 , G06F3/0655 , G06F3/0659 , G06F3/0679 , G06F3/0688 , G06F11/1068 , G11C29/52 , H03M13/2906 , G06F12/0246 , G06F2212/214 , G11C16/0483 , G11C16/24 , Y02D10/00
Abstract: A memory system including: a nonvolatile memory; first and second decoders configured to execute first and second error correction for correcting data read from the nonvolatile memory; and a controller configured to receive a first command issued by a host device, the first command being a command that requests neither reading nor writing data from or to the nonvolatile memory and that includes information indicative of acceptable latency of error correction, in response to receiving the first command, select one of the first decoder and the second decoder based on the received first command, and after receiving the first command, output data read from the nonvolatile memory through the selected one of the first decoder and the second decoder to the host device.
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公开(公告)号:US11726707B2
公开(公告)日:2023-08-15
申请号:US17523415
申请日:2021-11-10
Applicant: KIOXIA CORPORATION
Inventor: Shinichi Kanno , Hideki Yoshida , Naoki Esaka
IPC: G06F3/06 , G06F12/0804
CPC classification number: G06F3/0656 , G06F3/0604 , G06F3/0679 , G06F12/0804
Abstract: According to one embodiment, a memory system receives from a host a first write request including a first block identifier designating a first write destination block to which first write data is to be written. The memory system acquires the first write data from a write buffer temporarily holding write data corresponding to each of the write requests, and writes the first write data to a write destination page in the first write destination block. The memory system releases a region in the write buffer, storing data which is made readable from the first write destination block by writ the first write data to the write destination page. The data made readable is a data of a page in the first write destination block preceding the write destination page.
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公开(公告)号:US11416387B2
公开(公告)日:2022-08-16
申请号:US16899805
申请日:2020-06-12
Applicant: Kioxia Corporation
Inventor: Hideki Yoshida , Shinichi Kanno
Abstract: According to one embodiment, a memory system includes a nonvolatile memory including plural blocks each including plural pages, and a controller. When receiving a write request designating a first logical address and a first block number from the host, the controller determines a first location in a first block having the first block number to which data from the host should be written, and writes the data from the host to the first location in the first block. The controller notifies the host of either an in-block physical address indicative of the first location, or a group of the first logical address, the first block number and the first in-block physical address.
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公开(公告)号:US20220197817A1
公开(公告)日:2022-06-23
申请号:US17689787
申请日:2022-03-08
Applicant: Kioxia Corporation
Inventor: Hideki Yoshida , Shinichi Kanno
IPC: G06F12/1009 , G06F9/4401 , G06F12/02 , G06F3/06
Abstract: According to one embodiment, when a read request received from a host includes a first identifier indicative of a first region, a memory system obtains a logical address from the received read request, obtains a physical address corresponding to the obtained logical address from a logical-to-physical address translation table which manages mapping between logical addresses and physical addresses of the first region, and reads data from the first region, based on the obtained physical address. When the received read request includes a second identifier indicative of a second region, the memory system obtains physical address information from the read request, and reads data from the second region, based on the obtained physical address information.
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公开(公告)号:US12147673B2
公开(公告)日:2024-11-19
申请号:US18329446
申请日:2023-06-05
Applicant: Kioxia Corporation
Inventor: Hideki Yoshida , Shinichi Kanno
IPC: G06F3/06 , G06F12/02 , G06F12/1009
Abstract: According to one embodiment, when receiving a write request to designate a first block number and a first logical address from a host, a memory system determines a first location in a first block having the first block number, to which data from the host is to be written, and writes the data from the host to the first location of the first block. The memory system updates a first address translation table managing mapping between logical addresses and in-block physical addresses of the first block, and maps a first in-block physical address indicative of the first location to the first logical address.
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公开(公告)号:US12067298B2
公开(公告)日:2024-08-20
申请号:US17898390
申请日:2022-08-29
Applicant: KIOXIA CORPORATION
Inventor: Hideki Yoshida , Shinichi Kanno
IPC: G06F3/06
CPC classification number: G06F3/0665 , G06F3/061 , G06F3/0659 , G06F3/0688
Abstract: A memory system includes a nonvolatile memory including memory dies, and a controller. The controller is configured to create a first virtual storage with a first part of the memory dies and a second virtual storage with a second part of the memory dies, and create a redundant logical domain spanning one or more memory dies corresponding to the first virtual storage and one or more memory dies corresponding to the second virtual storage. The memory controller is configured to, in response to a write command, store write data corresponding to the write command in a first region of the first virtual storage and in a second region of the second virtual storage, and return to the host a response including a first physical address of the first region and a second physical address of the second region.
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