公开(公告)号：US20050098779A1

公开(公告)日：2005-05-12

申请号：US10625695

申请日：2003-07-24

申请人： Kazuhiro Nakajima ,  Kouji Kanba

发明人： Kazuhiro Nakajima ,  Kouji Kanba

IPC分类号： G01R31/28 ,  H01L21/3205 ,  H01L21/66 ,  H01L21/822 ,  H01L23/52 ,  H01L27/04 ,  H01L23/58

CPC分类号： H01L22/20 ,  H01L24/06 ,  H01L2224/05554 ,  H01L2924/14 ,  H01L2924/00

摘要： In a production process for producing a plurality of semiconductor devices on chip areas which are defined on a wafer, the wafer is processed such that each of the chip areas is produced as a semi-finished semiconductor device by forming a first wiring-arrangement section on each of the chip areas. The wafer is subjected to a provisional yield-rate test in which it is examined whether each of the semi-finished semiconductor devices on the wafer is acceptable or unacceptable to calculate a yield-rate of acceptable semi-finished semiconductor devices. When the wafer passes the provisional yield-rate test, the wafer is further processed such that each of the chip areas is produced as a finished semiconductor device by forming a second wiring-arrangement section on the first wiring-arrangement section.

摘要翻译： 在用于制造在晶片上限定的芯片区域上的多个半导体器件的生产工艺中，晶片被加工成使得每个芯片区域通过形成第一布线布置部分而形成为半成品半导体器件 每个芯片区域。 对晶片进行临时屈服率测试，其中检查晶片上的每个半成品半导体器件是否可接受或不可接受以计算可接受的半成品半导体器件的屈服率。 当晶片通过临时屈服率测试时，晶片被进一步处理，使得每个芯片区域通过在第一布线布置部分上形成第二布线布置部分而被制成成品半导体器件。

公开(公告)号：US09207482B2

公开(公告)日：2015-12-08

申请号：US13990658

申请日：2011-11-30

申请人： Tomotake Nashiki ,  Kazuhiro Nakajima ,  Hideo Sugawara ,  Tsuyoshi Chiba ,  Hiroaki Kishioka ,  Mayumi Kishioka ,  Tomohide Banba ,  Masahiro Ooura

发明人： Tomotake Nashiki ,  Kazuhiro Nakajima ,  Hideo Sugawara ,  Tsuyoshi Chiba ,  Hiroaki Kishioka ,  Tomohide Banba ,  Masahiro Ooura

IPC分类号： G02F1/1333 ,  G06F3/044 ,  G06F3/045 ,  G06F3/03

CPC分类号： G02F1/13338 ,  G02F1/133308 ,  G06F3/03 ,  G06F3/044 ,  G06F3/045 ,  Y10T428/24802 ,  Y10T428/24942 ,  Y10T428/2495 ,  Y10T428/24967

摘要： A capacitive touch sensor laminate for use in a display panel device includes: a dielectric central substrate structure made of a transparent resin material and formed to have flat surfaces, respectively, on opposite sides thereof; a at least one-layer structured coat layer made of a transparent material, formed on each of the flat surfaces, and including at least one refractive index adjusting layer for suppressing visibility of an electrode pattern formed by the transparent electrically conductive layer; and a transparent electrically conductive layer formed on and in adjacent relation to the coat layer. The at least one-layer structured coat layers formed on respective ones of the flat surfaces are configured such that thicknesses of corresponding layers therein on respective opposite sides of the dielectric central substrate structure are set to allow the corresponding layers to become mutually symmetrical across the dielectric central substrate structure.

摘要翻译： 一种用于显示面板装置的电容式触摸传感器层叠体包括：由透明树脂材料制成并分别形成在其相对侧上的平坦表面的电介质中心衬底结构; 形成在每个平坦表面上的由透明材料制成的至少一层结构的涂层，并且包括至少一个折射率调节层，用于抑制由透明导电层形成的电极图案的可视性; 以及形成在涂层上并与其相邻的透明导电层。 形成在各个平坦表面上的至少一层结构涂层被构造成使得其中介于其间的相应的层的相应层的厚度被设置为允许相应的层在电介质上互相对称 中心衬底结构。

公开(公告)号：US20120114919A1

公开(公告)日：2012-05-10

申请号：US13271625

申请日：2011-10-12

申请人： Kazuhiro Nakajima ,  Tomotake Nashiki ,  Hideo Sugawara

发明人： Kazuhiro Nakajima ,  Tomotake Nashiki ,  Hideo Sugawara

IPC分类号： B32B3/10 ,  B32B7/02

CPC分类号： G06F3/044 ,  G06F3/045 ,  G06F2203/04103 ,  Y10T428/24802 ,  Y10T428/24868 ,  Y10T428/2495

摘要： The present invention provides a transparent conductive film in which the difference in visibility between the pattern portion and the pattern opening portion is kept small even when a transparent conductive layer is patterned. The transparent conductive film has a first dielectric layer, a second dielectric layer, and a transparent conductive layer in this order on a transparent film substrate, a thickness d21 of the first dielectric layer is larger than a thickness d22 of the second dielectric layer, the thickness d21 of the first dielectric layer is 8 to 40 nm and the thickness d22 of the second dielectric layer is 5 to 25 nm, and a difference between the thickness d21 of the first dielectric layer and the thickness d22 of the second dielectric layer, d21-d22, is 3 to 30 nm.

摘要翻译： 本发明提供了一种透明导电膜，其中即使在透明导电层被图案化时，图案部分和图案开口部分之间的可见性差也保持较小。 透明导电膜在透明膜基板上依次具有第一电介质层，第二电介质层和透明导电层，第一电介质层的厚度d21大于第二电介质层的厚度d22， 第一电介质层的厚度d21为8〜40nm，第二电介质层的厚度d22为5〜25nm，第一电介质层的厚度d21与第二电介质层的厚度d22之差d21 -d22，为3〜30nm。

公开(公告)号：US20050218936A1

公开(公告)日：2005-10-06

申请号：US11092943

申请日：2005-03-30

申请人： Masaharu Mizuno ,  Kazuhiro Nakajima

发明人： Masaharu Mizuno ,  Kazuhiro Nakajima

IPC分类号： H01L21/822 ,  H01L27/04 ,  H03K19/173 ,  H03K19/0175

CPC分类号： H03K19/173

摘要： A universal logic module includes: a first inverter outputting an inverted input signal to an output terminal through a first transfer gate, the inverted input signal having an inverted level of an input signal provided from a first input terminal; and a second inverter outputting an inverted logic signal to the output terminal through a second transfer gate, the inverted logic signal having an inverted level of a first logic signal. The first input terminal is connected to one of a power supply line and a ground line. An input of the first transfer gate is directly connected to the other of the power supply line and the ground line. The first and the second transfer gates are complementarily turned on/off according to a level of a second logic signal. A result of a logical operation between the first and the second logic signals is outputted from the output terminal.

摘要翻译： 通用逻辑模块包括：第一反相器，通过第一传输门将反相输入信号输出到输出端，反相输入信号具有从第一输入端提供的输入信号的反相电平; 以及第二反相器，通过第二传输门将输出反相逻辑信号输出到输出端，反相逻辑信号具有第一逻辑信号的反相电平。 第一输入端子连接到电源线和接地线之一。 第一传输门的输入直接连接到电源线和接地线中的另一个。 根据第二逻辑信号的电平，第一和第二传输门互补地导通/截止。 从输出端子输出第一和第二逻辑信号之间的逻辑运算的结果。

公开(公告)号：US06946875B2

公开(公告)日：2005-09-20

申请号：US10325572

申请日：2002-12-19

申请人： Kenji Yamamoto ,  Masaharu Mizuno ,  Kazuhiro Nakajima

发明人： Kenji Yamamoto ,  Masaharu Mizuno ,  Kazuhiro Nakajima

IPC分类号： H01L21/82 ,  H03K19/00 ,  H03K19/173 ,  H03K19/094

CPC分类号： H03K19/1735

摘要： A universal logic module that may have a reduced off-leak current in universal logic cells (100) not used as logic circuits has been disclosed. A universal logic module may include universal logic cells (100) that may be formed with a second wiring for connecting universal logic cells (100) from a base configuration formed with a first wiring. Unused universal logic cell (100) may include transistors in basic cells (A to E) that are non-connected to a power supply (VDD) and/or a ground potential (VSS). Furthermore, unused universal logic cell (100) may include transistors in basic cells (A to E) that may provide a capacitor between a power supply (VDD) and a ground potential (VSS). In this way, off-leak current may be reduced and noise on a power line and/or a ground line may be reduced.

摘要翻译： 已经公开了可以在不用作逻辑电路的通用逻辑单元（100）中具有减小的漏电流的通用逻辑模块。 通用逻辑模块可以包括可以形成有第二布线的通用逻辑单元（100），用于将通用逻辑单元（100）与形成有第一布线的基座配置相连接。 未使用的通用逻辑单元（100）可以包括未连接到电源（VDD）和/或接地电位（VSS）的基本单元（A至E）中的晶体管。 此外，未使用的通用逻辑单元（100）可以包括可在电源（VDD）和接地电位（VSS）之间提供电容器的基本单元（A至E）中的晶体管。 以这种方式，可以减少泄漏电流，并且可以减少电力线和/或接地线上的噪声。

公开(公告)号：US06467882B2

公开(公告)日：2002-10-22

申请号：US07967412

申请日：1992-10-28

申请人： Toshiharu Inui ,  Kazuhiro Nakajima ,  Genji Inada

发明人： Toshiharu Inui ,  Kazuhiro Nakajima ,  Genji Inada

IPC分类号： B41J2/14 ,  B41J2/05

CPC分类号： B41J2/1404 ,  B41J2/14112 ,  B41J2002/14169 ,  B41J2002/14379 ,  B41J2002/14387

摘要： A liquid jet recording method using thermal energy to eject liquid from a liquid passage through an ejection outlet, the liquid passage being provided with a heat generating resistor, wherein at least one of the following conditions is satisfied: 0.1≦H/L≦0.9 R/L≧0.5 &phgr;/Wn≦1.0 S/Sh≦3.0 where L is a distance between the heat generating resistor and the ejection outlet, H is a height of the liquid passage, R is a maximum diameter of the ejection outlet, &phgr; is a converted diameter of the ejection outlet, Wn is a passage width of a portion where the heat generating resistor is disposed, S is an area of the ejection outlet, and Sh is an area of the. heat generating resistor; wherein a bubble created by heat generating resistor communicates with ambience.

摘要翻译： 一种液体喷射记录方法，使用热能从液体通道喷出液体通过喷射出口，所述液体通道设有发热电阻器，其中满足以下条件中的至少一个：0.1 <= H / L < 0.9R / L> = 0.5phi / Wn <= 1.0S / Sh <= 3.0其中L是发热电阻和喷射出口之间的距离，H是液体通道的高度，R是最大直径 喷射出口，phi是喷射出口的转换直径，Wn是设置发热电阻器的部分的通道宽度，S是喷射出口的面积，Sh是该喷射出口的面积。 发热电阻; 其中由发热电阻产生的气泡与环境通气。

公开(公告)号：US06278527B1

公开(公告)日：2001-08-21

申请号：US09002372

申请日：1998-01-02

申请人： Hiroyuki Maeda ,  Yuko Suga ,  Hiroshi Sugiyama ,  Akira Katayama ,  Akihiko Shimomura ,  Kazuhiro Nakajima

发明人： Hiroyuki Maeda ,  Yuko Suga ,  Hiroshi Sugiyama ,  Akira Katayama ,  Akihiko Shimomura ,  Kazuhiro Nakajima

IPC分类号： G06K1500

CPC分类号： H04N1/00297 ,  G06K15/00 ,  G06K2215/0011 ,  G06K2215/0014 ,  G06K2215/0071 ,  H04N1/00283

摘要： An output apparatus which produces the print output by saving in a first memory print data input via a two-way interface, and converting the print data into the print out information, comprising a second memory different from the first memory for saving the print data with a print ID number added which is input via the interface, a retrieving unit for retrieving corresponding print data of the second memory based on a print ID number input from the outside, and an output unit for outputting the retrieved print data converted into the print out information.

摘要翻译： 一种输出装置，其通过保存经由双向接口输入的第一存储器打印数据并将打印数据转换为打印输出信息来产生打印输出，该打印输出装置包括与第一存储器不同的第二存储器，用于保存打印数据， 经由接口输入的打印ID号码，基于从外部输入的打印ID号来检索第二存储器的相应打印数据的检索单元，以及用于输出被转换成打印输出的检索到的打印数据的输出单元 信息。

公开(公告)号：US06203142B1

公开(公告)日：2001-03-20

申请号：US07968537

申请日：1992-10-29

申请人： Toshiharu Inui ,  Kazuhiro Nakajima

发明人： Toshiharu Inui ,  Kazuhiro Nakajima

IPC分类号： B41J205

CPC分类号： B41J2/1404 ,  B41J2002/14169 ,  B41J2002/14379 ,  B41J2002/14387

摘要： A liquid jet recording method using thermal energy to eject liquid from a liquid passage through an ejection outlet, the liquid passage being provided with a heat generating resistor, wherein the following conditions are satisfied: S1≧S2/3, and S2≧S3/3 where S1 is an area of the heat generating resistor, and S2 is a projected area, onto a surface having the heat generating resistor, of the liquid passage between the ejection outlet and the heat generating resistor; wherein a bubble created by the heat generating resistor communicates with ambience when the liquid is ejected.

摘要翻译： 一种液体喷射记录方法，其使用热能从液体通过喷射出口喷射液体，液体通道设有发热电阻器，其中满足以下条件：S1> = S2 / 3，S2 = S3 / 3其中S1是发热电阻器的面积，S2是在喷射出口和发热电阻器之间的液体通道的具有发热电阻器的表面上的投影面积; 其中当所述液体被喷射时，由所述发热电阻产生的气泡与气氛相通。

公开(公告)号：US6149261A

公开(公告)日：2000-11-21

申请号：US689684

申请日：1996-08-13

申请人： Nobuyuki Kuwabara ,  Hiroshi Tajika ,  Kazuhiro Nakajima ,  Shuichi Murakami ,  Tamaki Sato

发明人： Nobuyuki Kuwabara ,  Hiroshi Tajika ,  Kazuhiro Nakajima ,  Shuichi Murakami ,  Tamaki Sato

IPC分类号： B41J2/165

CPC分类号： B41J2/16532 ,  B41J2/16523

摘要： An ink jet apparatus, used with an exchangeable ink jet cartridge having an ink jet head and an ink container, includes a cap, a sucking device and a controller. When the cap caps the ejection orifices of the recording head, the sucking device sucks ink from the ejection orifices. The controller controls the operation of the cap and sucking device. After a sucking operation is performed, the cap is held away from the ejection orifices for a predetermined duration of time; the capping and sucking operations are then repeated.

摘要翻译： 与具有喷墨头和墨水容器的可更换喷墨墨盒一起使用的喷墨装置包括盖，吸附装置和控制器。 当盖帽盖住记录头的喷射口时，吸引装置从喷射孔吸入墨水。 控制器控制盖和抽吸装置的操作。 在执行抽吸操作之后，将盖子从喷射口保持预定的持续时间; 然后重复加帽和吸吮操作。

公开(公告)号：US5021114A

公开(公告)日：1991-06-04

申请号：US221272

申请日：1988-07-19

申请人： Hiroshi Saito ,  Yasumichi Suzuki ,  Shunji Sasabe ,  Kazuhiro Nakajima

发明人： Hiroshi Saito ,  Yasumichi Suzuki ,  Shunji Sasabe ,  Kazuhiro Nakajima

IPC分类号： C23C16/517 ,  H01J37/32

CPC分类号： H01J37/32247 ,  C23C16/517 ,  H01J37/32192 ,  H01J37/3266

摘要： A sputter etching apparatus including a vacuum chamber provided with a gas supply system and an evacuator, a sputter etching electrode disposed within the vacuum chamber on which a substrate is disposed, a plasma generator for generating plasma by applying microwave energy and disposed in opposition to the sputter etching electrode, a voltage applying stud provided in association with the sputter etching electrode for causing ions in the plasma to impact against the substrate, a first power supply source provided in association with the plasma generator for generating the plasma, and a second power supply source provided independent of the first power supply source for supplying the voltage for causing the ions to impact against the substrate. A magnetic field generating magnet or coil assembly can be incorporated in the apparatus for generating a magnetic field in such a manner in which the plasma produced within a space defined between the substrate and the microwave inlet window is peripherally surrounded by the magnetic lines of forces. Further disclosed in a plasma treatment apparatus which includes an activating chamber equipped with plasma generator and a first raw gas supplying system, a reaction chamber spatially coupled to the activating chamber and containing an electrode for supporting thereon a substrate to be treated, an evacuator for evacuating the activating chamber and the reaction chamber down to a predetermined pressure. The activating chamber is directly connected to the reaction chamber for shortening the distance between the activating chamber and the substrate to be treated. A second raw gas supplying system for supplying a raw gas to the reaction chamber is provided in the connecting portion between the activating chamber and the reacting chamber.