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45 条记录 (耗时 0.026 秒)

    Guidance and control for an autonomous soaring UAV
    3.
    发明授权
    Guidance and control for an autonomous soaring UAV 有权
    无人机自主飞行的指导和控制

    公开(公告)号：US07431243B1

    公开(公告)日：2008-10-07

    申请号：US11277325

    申请日：2006-03-23

    申请人： Michael J. Allen

    发明人： Michael J. Allen

    IPC分类号： G05D1/00 ,  B64C31/02 ,  B64C13/00 ,  B64C19/00 ,  G01C23/00

    CPC分类号： G05D1/0005 ,  B64C2201/141

    摘要： The present invention provides a practical method for UAVs to take advantage of thermals in a manner similar to piloted aircrafts and soaring birds. In general, the invention is a method for a UAV to autonomously locate a thermal and be guided to the thermal to greatly improve range and endurance of the aircraft.

    摘要翻译： 本发明提供了一种实用的方法，用于无人机以类似于驾驶飞机和飞鸟的方式利用热量。 通常，本发明是一种UAV自主定位热量并被引导到热量的方法，以极大地提高飞机的射程和耐久性。

    Device structure for high voltage tolerant transistor on a 3.3 volt process
    4.
    发明授权
    Device structure for high voltage tolerant transistor on a 3.3 volt process 失效
    3.3伏特工艺下高耐压晶体管的器件结构

    公开(公告)号：US6043538A

    公开(公告)日：2000-03-28

    申请号：US367917

    申请日：1995-01-03

    申请人： Michael J. Allen ,  Stephen F. Sullivan

    发明人： Michael J. Allen ,  Stephen F. Sullivan

    IPC分类号： H01L21/8234 ,  H01L27/07 ,  H01L23/62

    CPC分类号： H01L27/0705 ,  H01L21/823425

    摘要： An integrated circuit which includes a first transistor device portion having an N+ doped region drain terminal in an N- well in a P- substrate, an N+ doped region source terminal in the P- substrate, and a gate separated from the source and drain regions by a layer of silicon dioxide; and a second transistor device portion including an N+ doped region drain terminal in the P- substrate, an N+ doped region source terminal in the P- substrate, and a gate separated from the source and drain regions by a layer of silicon dioxide; conductive means connecting the drain region of the first transistor device portion to a node to be discharged, a conductor connecting the gate of the first transistor device portion to a source of biasing potential equal to the source voltage used in a low voltage process, another conductor connecting the source of the second transistor device portion to a source of ground potential; and a third conductor for providing a source of positive input potential to the gate terminal of the second transistor device portion. The enabling of the second transistor device portion enables the first transistor device portion and discharges the node without causing breakdown of the silicon dioxide layers or any junction of the first and the second transistor device portions because the large N well distributes the high voltage over a number of junctions so that no junction sees a breakdown voltage.

    摘要翻译： 一种集成电路，其包括在P-衬底中的N阱中具有N +掺杂区域漏极端子的第一晶体管器件部分，P衬底中的N +掺杂区域源极端子和从源极和漏极区域分离的栅极 通过一层二氧化硅; 以及第二晶体管器件部分，其包括P-衬底中的N +掺杂区域漏极端子，P衬底中的N +掺杂区域源极端子以及通过二氧化硅层与源极和漏极区域分离的栅极; 将第一晶体管器件部分的漏极区域连接到要放电的节点的导电装置，将第一晶体管器件部分的栅极连接到等于在低电压工艺中使用的源极电压的偏置电位的源极的导体， 将所述第二晶体管器件部分的源极连接到地电势源; 以及用于向第二晶体管器件部分的栅极端子提供正输入电位源的第三导体。 第二晶体管器件部分的使能使得第一晶体管器件部分能够放电，而不会引起二氧化硅层或第一和第二晶体管器件部分的任何结的破坏，因为大N阱将高电压分布在数字上 的结，使得没有结点看到击穿电压。

    Electric guitar with transducer cradles
    6.
    发明授权
    Electric guitar with transducer cradles 失效
    电吉他带传感器支架

    公开(公告)号：US5252777A

    公开(公告)日：1993-10-12

    申请号：US926272

    申请日：1992-08-10

    申请人： Michael J. Allen

    发明人： Michael J. Allen

    IPC分类号： G10H3/18 ,  G10H1/32 ,  G10H3/00

    CPC分类号： G10H3/182 ,  G10H3/181

    摘要： The instant invention encompasses the combination of a modified electric guitar component coupled with a plurality of equivalent one-coil and equivalent two-coil transducer cradle components attached thereto upon which cradles, transducers are permanently mounted respectively. The transducer cradle components are readily amenable to detachment from and reattachment to the body of the electric guitar component and as well to speedy frontwise insertion into or frontwise removal from the modification of the electric guitar component, to wit, appropriately contoured openings in the front of the body of the electric guitar component below the level of intact guitar strings. Metallic contact rods on each cradle component receive transducer wiring emanating from a permanently mounted transducer and contact, upon insertion of a given cradle into a given opening, by way of contact points in the front wall of the opening, the internal wiring within the modified electric guitar component and ultimately, an amplifier.

    摘要翻译： 本发明包括与多个等效的单线圈和等效的双线圈换能器支架组件耦合的修改的电吉他组件的组合，其上分别永久地安装有支架，换能器。 传感器支架部件易于从电吉他部件的主体上脱离和重新连接，以及快速地从电吉他部件的改型向前方向插入或向前移除，以及前面的适当轮廓的开口 电吉他组件的身体低于完整吉他弦的水平。 每个支架部件上的金属接触杆接收从永久安装的传感器发出的传感器接线片和接触件，在将给定的支架插入给定的开口中时，通过开口前壁中的接触点，改良的电气内部的接线 吉他组件，最终是放大器。

    Programmable logic device with limited signal swing
    7.
    发明授权
    Programmable logic device with limited signal swing 失效
    可编程逻辑器件，信号摆幅有限

    公开(公告)号：US5187392A

    公开(公告)日：1993-02-16

    申请号：US738783

    申请日：1991-07-31

    申请人： Michael J. Allen

    发明人： Michael J. Allen

    IPC分类号： H03K19/177

    CPC分类号： H03K19/1776 ,  H03K19/17704 ,  H03K19/17784 ,  H03K19/17792

    摘要： A programmable logic device is described. The programmable logic device includes a plurality of memory cells, each having a drain, a source, a floating gate, and a control gate. A first bit line is coupled the drain of each of the plurality memory cells. The bit line provides a voltage level. A second bit line is coupled to the source of each of the plurality of memory cells. The programmable logic device further includes means for controlling the voltage level to swing between a first voltage state and a second voltage state. The controlling means receives current from the first bit line to clamp the voltage level to the first voltage state when the voltage level exceeds the first voltage state. The controlling means provides current to the first bit line and limits current flow of the first bit line to maintain the voltage level to the second voltage state when the voltage level exceeds below the second voltage state.

    摘要翻译： 描述可编程逻辑器件。 可编程逻辑器件包括多个存储单元，每个存储单元具有漏极，源极，浮动栅极和控制栅极。 第一位线耦合多个存储单元中的每一个的漏极。 位线提供电压电平。 第二位线耦合到多个存储器单元中的每一个的源极。 可编程逻辑器件还包括用于控制在第一电压状态和第二电压状态之间摆动的电压电平的装置。 当电压电平超过第一电压状态时，控制装置从第一位线接收电流以将电压电平钳位到第一电压状态。 当电压电平超过第二电压状态时，控制装置向第一位线提供电流并且限制第一位线的电流流动以将电压电平维持到第二电压状态。

    Voltage clamp
    8.
    发明授权
    Voltage clamp 失效
    电压钳

    公开(公告)号：US06426854B1

    公开(公告)日：2002-07-30

    申请号：US09096730

    申请日：1998-06-10

    申请人： Michael J. Allen

    发明人： Michael J. Allen

    IPC分类号： H02H900

    CPC分类号： H03K19/00315

    摘要： Briefly, in accordance with one embodiment of the invention, an integrated circuit includes a bias voltage source. The bias voltage source is coupled to a pad of the integrated circuit so as to clamp the pad voltage to the bias voltage when, during circuit operation, the voltage of the pad exceeds an upper voltage rail of the integrated circuit.

    摘要翻译： 简而言之，根据本发明的一个实施例，集成电路包括偏置电压源。 偏置电压源耦合到集成电路的焊盘，以便在电路工作期间，焊盘电压超过集成电路的上电压轨，将焊盘电压钳位到偏置电压。

    Stress-follower circuit configuration
    9.
    发明授权
    Stress-follower circuit configuration 失效
    应力跟随电路配置

    公开(公告)号：US06351358B1

    公开(公告)日：2002-02-26

    申请号：US09096283

    申请日：1998-06-11

    申请人： Michael J. Allen

    发明人： Michael J. Allen

    IPC分类号： H02H320

    CPC分类号： H03K17/0822 ,  H03K17/102 ,  H03K19/00315

    摘要： Briefly, in accordance with one embodiment of the invention, an integrated circuit includes: a stress-follower circuit configuration. The stress-follower circuit of the configuration is coupled to a pad of the integrated circuit. The stress-follower circuit configuration is coupled so as to reduce the voltage stress on the gate of a transistor in a transistor stack so that in operation the transistor in the stack tolerates an operating voltage approximately 1.5 volts above its nominal voltage. The transistor stack is also coupled to the pad.

    摘要翻译： 简而言之，根据本发明的一个实施例，集成电路包括：应力跟随器电路配置。 该结构的应力跟随器电路耦合到集成电路的焊盘。 应力跟随器电路配置被耦合以便降低晶体管堆叠中的晶体管的栅极上的电压应力，使得在工作中，堆叠中的晶体管容许高于其标称电压约1.5伏的工作电压。 晶体管堆叠也耦合到焊盘。

    Stress-follower circuit configuration
    10.
    发明授权
    Stress-follower circuit configuration 有权

    公开(公告)号：US06285537B1

    公开(公告)日：2001-09-04

    申请号：US09753646

    申请日：2001-01-02

    申请人： Michael J. Allen

    发明人： Michael J. Allen

    IPC分类号： H02H900

    摘要： Briefly, in accordance with one embodiment of the invention, an integrated circuit includes: a stress-follower circuit configuration. The stress-follower circuit of the configuration is coupled to a pad of the integrated circuit. The stress-follower circuit configuration is coupled so as to reduce the voltage stress on the gate of a transistor in a transistor stack so that in operation the transistor in the stack tolerates an operating voltage approximately 1.5 volts above its nominal voltage. The transistor stack is also coupled to the pad.