公开(公告)号：US10690414B2

公开(公告)日：2020-06-23

申请号：US14966198

申请日：2015-12-11

Applicant: Lam Research Corporation

Inventor： Keith William Gaff ,  Benny Wu ,  Eric A. Pape

IPC: F27B17/00 ,  H01L21/683 ,  H01L21/67 ,  H05B3/00 ,  H05B3/26 ,  F27D11/02

Abstract: A semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a multi-plane heater such as a heater array comprising thermal control elements operable to tune a spatial temperature profile on the semiconductor substrate. The multi-plane heater includes at least one pair of vertically offset heating elements connected in series or parallel to control heating output in a heating zone on the substrate support. The thermal control elements can be powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones.

公开(公告)号：US09530679B2

公开(公告)日：2016-12-27

申请号：US13868044

申请日：2013-04-22

Applicant: Lam Research Corporation

Inventor： Keith William Gaff ,  Neil Martin Paul Benjamin

IPC: G01N25/00 ,  H01L21/683 ,  H01L21/67

CPC classification number: H01L21/6833 ,  H01L21/67248

Abstract: A chuck includes a first material layer having an upper surface upon which a wafer is supported. The upper surface includes portions that physically contact the wafer and portions that form gaps between the upper surface and the wafer. The chuck also includes a second material layer defined to support the first material layer. The second material layer is formed of a thermally conductive material and includes a first number of channels. The chuck also includes a second number of channels defined to direct a gas to portions of the upper surface that form gaps between the upper surface and the wafer. The chuck is characterized by a thermal calibration curve that represents a thermal interface between the upper surface and the wafer, heat transfer through the first material layer to the second material layer, and heat transfer through the second material layer to the first number of channels.

Abstract translation: 卡盘包括具有上表面的第一材料层，晶片被支撑在该上表面上。 上表面包括物理接触晶片的部分和在上表面和晶片之间形成间隙的部分。 卡盘还包括限定为支撑第一材料层的第二材料层。 第二材料层由导热材料形成并且包括第一数量的通道。 卡盘还包括限定为将气体引导到在上表面和晶片之间形成间隙的上表面的部分的通道的第二数量。 卡盘的特征在于热校准曲线，其表示上表面和晶片之间的热界面，通过第一材料层的热传递到第二材料层，以及通过第二材料层的热传递到第一数量的通道。

公开(公告)号：US20140110060A1

公开(公告)日：2014-04-24

申请号：US14139238

申请日：2013-12-23

Applicant: Lam Research Corporation

Inventor： Keith William Gaff ,  Harmeet Singh ,  Keith Comendant ,  Vahid Vahedi

IPC: H01J37/20

CPC classification number: H01J37/20 ,  H01L21/67248 ,  H01L22/12 ,  H01L22/20 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A plasma etching system having a substrate support assembly with multiple independently controllable heater zones. The plasma etching system is configured to control etching temperature of predetermined locations so that pre-etch and/or post-etch non-uniformity of critical device parameters can be compensated for.

Abstract translation: 一种等离子体蚀刻系统，具有具有多个可独立控制的加热器区域的基板支撑组件。 等离子体蚀刻系统被配置为控制预定位置的蚀刻温度，从而可以补偿临界器件参数的预蚀刻和/或蚀刻后不均匀性。

公开(公告)号：US11781650B2

公开(公告)日：2023-10-10

申请号：US15843849

申请日：2017-12-15

Applicant: Lam Research Corporation

Inventor： David Schaefer ,  Ambarish Chhatre ,  Keith William Gaff ,  Sung Je Kim ,  Brooke Mesler Lai

IPC: F16J15/02 ,  H01J37/32 ,  H02N13/00 ,  H01L21/683

CPC classification number: F16J15/021 ,  H01J37/3255 ,  H01J37/32495 ,  H01J37/32532 ,  H01J37/32568 ,  H01J37/32715 ,  H01J37/32724 ,  H01L21/6831 ,  H01L21/6833 ,  H01L21/6838 ,  H02N13/00 ,  Y10T29/49908

Abstract: An edge seal for sealing an outer surface of a lower electrode assembly configured to support a semiconductor substrate in a plasma processing chamber, the lower electrode assembly including an annular groove defined between a lower member and an upper member of the lower electrode assembly. The edge seal includes an elastomeric band configured to be arranged within the groove, the elastomeric band having an annular upper surface, an annular lower surface, an inner surface, and an outer surface. When the elastomeric band is in an uncompressed state, the outer surface of the elastomeric band is concave. When the upper and lower surfaces are axially compressed at least 1% such that the elastomeric band is in a compressed state, an outward bulging of the outer surface is not greater than a predetermined distance. The predetermined distance corresponds to a maximum outer diameter of the elastomeric band in the uncompressed state.

公开(公告)号：US10770363B2

公开(公告)日：2020-09-08

申请号：US16056967

申请日：2018-08-07

Applicant: Lam Research Corporation

Inventor： Keith William Gaff ,  Tom Anderson ,  Keith Comendant ,  Ralph Jan-Pin Lu ,  Paul Robertson ,  Eric A. Pape ,  Neil Benjamin

IPC: H01L21/67 ,  H01L21/66 ,  H01L21/683

Abstract: A semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a heater array comprising thermal control elements operable to tune a spatial temperature profile on the semiconductor substrate, the thermal control elements defining heater zones each of which is powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones. A power distribution circuit is mated to a baseplate of the substrate support, the power distribution circuit being connected to each power supply line and power return line of the heater array. A switching device is connected to the power distribution circuit to independently provide time-averaged power to each of the heater zones by time divisional multiplexing of a plurality of switches.

公开(公告)号：US20170322546A1

公开(公告)日：2017-11-09

申请号：US15657858

申请日：2017-07-24

Applicant: LAM RESEARCH CORPORATION

Inventor： Ole Waldmann ,  Eric A. Pape ,  Carlos Leal-Verdugo ,  Keith William Gaff

IPC: G05B19/418 ,  H01L21/67

Abstract: A method of determining thermal stability of an upper surface of a substrate support assembly in a plasma processing apparatus includes: before processing of at least one substrate in the plasma processing apparatus and while powering an array of thermal control elements of the substrate support assembly to achieve a desired spatial and temporal temperature of the upper surface of the substrate support assembly, recording pre-process temperature data of the substrate support assembly; after the processing of the at least one substrate in the plasma processing apparatus and while powering the array of thermal control elements to achieve the desired spatial and temporal temperature of the upper surface of the substrate support assembly, recording post-process temperature data; comparing the post-process temperature data to the pre-process temperature data; and determining whether the post-process temperature data is within a predetermined tolerance range of the pre-process temperature data.

公开(公告)号：US20180374763A1

公开(公告)日：2018-12-27

申请号：US16056967

申请日：2018-08-07

Applicant: Lam Research Corporation

Inventor： Keith William Gaff ,  Tom Anderson ,  Keith Comendant ,  Ralph Jan-Pin Lu ,  Paul Robertson ,  Eric A. Pape ,  Neil Benjamin

IPC: H01L21/66 ,  H01L21/67 ,  H01L21/683

CPC classification number: H01L22/14 ,  H01L21/67103 ,  H01L21/67109 ,  H01L21/67248 ,  H01L21/6831 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor substrate support for supporting a semiconductor substrate in a plasma processing chamber includes a heater array comprising thermal control elements operable to tune a spatial temperature profile on the semiconductor substrate, the thermal control elements defining heater zones each of which is powered by two or more power supply lines and two or more power return lines wherein each power supply line is connected to at least two of the heater zones and each power return line is connected to at least two of the heater zones. A power distribution circuit is mated to a baseplate of the substrate support, the power distribution circuit being connected to each power supply line and power return line of the heater array. A switching device is connected to the power distribution circuit to independently provide time-averaged power to each of the heater zones by time divisional multiplexing of a plurality of switches.

公开(公告)号：US10090211B2

公开(公告)日：2018-10-02

申请号：US14141079

申请日：2013-12-26

Applicant: Lam Research Corporation

Inventor： Keith William Gaff ,  Matthew Busche ,  Anthony Ricci ,  Henry S. Povolny ,  Scott Stevenot

IPC: H01L21/67 ,  H01L21/66 ,  H01J37/32

Abstract: A lower electrode assembly useful for supporting a semiconductor substrate in a plasma processing chamber includes a temperature controlled base plate, an upper plate above the base plate, and an annular mounting groove surrounding a bond layer located between the base plate and the upper plate. The mounting groove includes an inner wall, an opening of the mounting groove faces radially outward relative to the inner wall, and the mounting groove includes a step extending downward from the upper plate on an upper wall of the groove or extending upward from the base plate on a lower wall of the groove. An edge seal including a compressible ring is mounted in the groove such that the compressible ring is compressed between the upper plate and the base plate to cause an outer surface of the compressible ring to be biased radially outward relative to the inner wall toward the step.

公开(公告)号：US20160372352A1

公开(公告)日：2016-12-22

申请号：US14859951

申请日：2015-09-21

Applicant: Lam Research Corporation

Inventor： Benny Wu ,  Eric A. Pape ,  Keith William Gaff

IPC: H01L21/67 ,  G05B19/418 ,  G05D23/19 ,  H01L21/683

CPC classification number: H01L21/67248 ,  H01J2237/2001 ,  H01L21/324 ,  H01L21/6831 ,  H01L22/12

Abstract: A system for controlling a temperature of a wafer processing substrate includes memory that stores first data indicative of first temperature responses of at least one first thermal control element. The first data corresponds to the first temperature responses as observed when a first control parameter of the at least one first thermal control element is maintained at a first predetermined first value. A first controller receives a setpoint temperature for the wafer processing substrate and maintains the first control parameter of the at least one first thermal control element at a second value based on the received setpoint temperature. A second controller retrieves the first data from the memory, calculates second data indicative of temperature non-uniformities associated with the wafer processing substrate based on the first data and the second value, and controls a plurality of second thermal control elements based on the calculated second data.

Abstract translation: 用于控制晶片处理衬底的温度的系统包括存储器，其存储指示至少一个第一热控制元件的第一温度响应的第一数据。 第一数据对应于当至少一个第一热控制元件的第一控制参数保持在第一预定第一值时观察到的第一温度响应。 第一控制器接收晶片处理衬底的设定点温度，并且基于所接收的设定点温度将所述至少一个第一热控制元件的第一控制参数保持在第二值。 第二控制器从存储器检索第一数据，基于第一数据和第二值计算指示与晶片处理衬底相关联的温度不均匀性的第二数据，并且基于计算的第二数据控制多个第二热控元件 数据。

公开(公告)号：US20150364388A1

公开(公告)日：2015-12-17

申请号：US14307062

申请日：2014-06-17

Applicant: Lam Research Corporation

Inventor： Ole Waldmann ,  Eric A. Pape ,  Keith William Gaff ,  Harmeet Singh

IPC: H01L21/66

CPC classification number: H01L21/67109 ,  H01L21/67248 ,  H01L21/67288

Abstract: A method for auto-correction of at least one malfunctioning thermal control element among an array of thermal control elements that are independently controllable and located in a temperature control plate of a substrate support assembly which supports a semiconductor substrate during processing thereof, the method including: detecting, by a control unit including a processor, that at least one thermal control element of the array of thermal control elements is malfunctioning; deactivating, by the control unit, the at least one malfunctioning thermal control element; and modifying, by the control unit, a power level of at least one functioning thermal control element in the temperature control plate to minimize impact of the malfunctioning thermal control element on the desired temperature output at the location of the at least one malfunctioning thermal control element.

Abstract translation: 一种用于自动校正热控制元件阵列中的至少一个故障热控元件的方法，所述热控制元件阵列可独立控制并位于在其处理期间支撑半导体衬底的衬底支撑组件的温度控制板中，所述方法包括： 通过包括处理器的控制单元检测所述热控元件阵列中的至少一个热控元件是故障的; 由所述控制单元使所述至少一个故障热控制元件停用; 以及通过所述控制单元修改所述温度控制板中的至少一个功能性热控制元件的功率水平，以使所述故障热控制元件对所述至少一个故障热控制元件的位置处的所需温度输出的影响最小化 。