Display apparatus having a substrate hole

    公开(公告)号:US11894504B2

    公开(公告)日:2024-02-06

    申请号:US16943889

    申请日:2020-07-30

    CPC classification number: H01L33/62 H01L33/382 H01L33/44 H01L33/54

    Abstract: A display apparatus is provided. The display apparatus can include a substrate hole penetrating a device substrate, light-emitting devices spaced away from the substrate hole, and at least one separating device between the substrate hole and the light-emitting devices. Each of the light-emitting devices can include a light-emitting layer between a first electrode and a second electrode. The separating device can surround the substrate hole. The separating device can include at least one under-cut structure. The under-cut structure can include a depth and a length, which are larger than a thickness of the light-emitting layer. Thus, in the display apparatus, the damage of the light-emitting devices due to external moisture permeating through the substrate hole can be prevented.

    Display Apparatus
    2.
    发明公开
    Display Apparatus 审中-公开

    公开(公告)号:US20230207570A1

    公开(公告)日:2023-06-29

    申请号:US18175234

    申请日:2023-02-27

    CPC classification number: H01L27/1237 H01L27/1225 H10K59/12

    Abstract: A display apparatus includes an oxide semiconductor pattern disposed on a device substrate and including a channel region disposed between a source region and a drain region, a gate electrode overlapping the channel region of the oxide semiconductor pattern and having a structure in which a first hydrogen barrier layer and a gate conductive layer are stacked, and a gate insulating film disposed between the oxide semiconductor pattern and the gate electrode to expose the source region and the drain region of the oxide semiconductor pattern. The gate electrode exposes a portion of the gate insulating film that is adjacent to the source region and a portion of the gate insulating film that is adjacent to the drain region.

    Display Apparatus
    3.
    发明申请

    公开(公告)号:US20240381705A1

    公开(公告)日:2024-11-14

    申请号:US18780021

    申请日:2024-07-22

    Abstract: A display apparatus includes a first TFT in a display area including a first semiconductor pattern including a polysilicon, a first gate electrode overlapping with the first semiconductor pattern under conditions that a first gate insulating layer is interposed, and first source and drain electrodes connected to the first semiconductor pattern, a second TFT in the display area including a second semiconductor pattern including a first oxide semiconductor, a second gate electrode overlapping with the second semiconductor pattern under conditions that second and third gate insulating layers are interposed, second source and drain electrodes connected to the second semiconductor pattern, and a third TFT in a non-display area including a third semiconductor pattern including a second oxide semiconductor, a third gate electrode overlapping with the third semiconductor pattern under conditions that the third gate insulating layer is interposed, and third source and drain electrodes connected to the third semiconductor pattern.

    Display apparatus having an oxide semiconductor pattern

    公开(公告)号:US12022704B2

    公开(公告)日:2024-06-25

    申请号:US18105682

    申请日:2023-02-03

    CPC classification number: H10K59/131 H10K50/844

    Abstract: A display apparatus can include a substrate including a display area and a non-display area adjacent to the display area, a first thin film transistor in the display area, and a second thin film transistor in the display area. The first thin film transistor can include a first semiconductor pattern on the substrate, a first gate electrode overlapping the first semiconductor pattern, and a first source electrode and a first drain electrode both connected to the first semiconductor pattern. The second thin film transistor can include a second semiconductor pattern, a second gate electrode overlapping the second semiconductor pattern, a second source electrode connected to the second semiconductor pattern, and a second drain electrode connected to the second semiconductor pattern. The display apparatus can further include a conductive pattern between the display area and the second semiconductor pattern.

    Display apparatus
    7.
    发明授权

    公开(公告)号:US11616082B2

    公开(公告)日:2023-03-28

    申请号:US16920467

    申请日:2020-07-03

    Abstract: A display apparatus includes an oxide semiconductor pattern disposed on a device substrate and including a channel region disposed between a source region and a drain region, a gate electrode overlapping the channel region of the oxide semiconductor pattern and having a structure in which a first hydrogen barrier layer and a gate conductive layer are stacked, and a gate insulating film disposed between the oxide semiconductor pattern and the gate electrode to expose the source region and the drain region of the oxide semiconductor pattern. The gate electrode exposes a portion of the gate insulating film that is adjacent to the source region and a portion of the gate insulating film that is adjacent to the drain region.

    Display Apparatus
    8.
    发明公开
    Display Apparatus 审中-公开

    公开(公告)号:US20230157089A1

    公开(公告)日:2023-05-18

    申请号:US18156228

    申请日:2023-01-18

    CPC classification number: H10K59/124 H01L29/7869

    Abstract: A display apparatus includes a first TFT in a display area including a first semiconductor pattern including a polysilicon, a first gate electrode overlapping with the first semiconductor pattern under conditions that a first gate insulating layer is interposed, and first source and drain electrodes connected to the first semiconductor pattern, a second TFT in the display area including a second semiconductor pattern including a first oxide semiconductor, a second gate electrode overlapping with the second semiconductor pattern under conditions that second and third gate insulating layers are interposed, second source and drain electrodes connected to the second semiconductor pattern, and a third TFT in a non-display area including a third semiconductor pattern including a second oxide semiconductor, a third gate electrode overlapping with the third semiconductor pattern under conditions that the third gate insulating layer is interposed, and third source and drain electrodes connected to the third semiconductor pattern.

    Display apparatus having an oxide semiconductor pattern

    公开(公告)号:US11600684B2

    公开(公告)日:2023-03-07

    申请号:US17135564

    申请日:2020-12-28

    Abstract: A display apparatus in which a thin film transistor of each pixel region includes an oxide semiconductor pattern is provided. The pixel regions can be disposed on a display area of a device substrate. The display area can be electrically connected to the gate driver by gate lines. An encapsulating element can be disposed on the thin film transistor of each pixel region. The encapsulating element can extend beyond the display area. The gate lines can overlap the encapsulating element. A barrier line can be disposed between the gate lines and the encapsulating element. The barrier line can include a hydrogen barrier material. Thus, in the display apparatus, the characteristics deterioration of the thin film transistor due to the encapsulating element can be prevented or minimized.

    Display apparatus
    10.
    发明授权

    公开(公告)号:US11587997B2

    公开(公告)日:2023-02-21

    申请号:US17126547

    申请日:2020-12-18

    Abstract: A display apparatus includes a first TFT in a display area including a first semiconductor pattern including a polysilicon, a first gate electrode overlapping with the first semiconductor pattern under conditions that a first gate insulating layer is interposed, and first source and drain electrodes connected to the first semiconductor pattern, a second TFT in the display area including a second semiconductor pattern including a first oxide semiconductor, a second gate electrode overlapping with the second semiconductor pattern under conditions that second and third gate insulating layers are interposed, second source and drain electrodes connected to the second semiconductor pattern, and a third TFT in a non-display area including a third semiconductor pattern including a second oxide semiconductor, a third gate electrode overlapping with the third semiconductor pattern under conditions that the third gate insulating layer is interposed, and third source and drain electrodes connected to the third semiconductor pattern.

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