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公开(公告)号：US4238770A
公开(公告)日：1980-12-09
申请号：US79252
申请日：1979-09-27
摘要： There is disclosed a vertical synchronizing signal detector circuit for use with a PCM recording/reproducing system which records and reproduces audio signals with pulse code modulation by the use of a home VTR system or a part thereof. The vertical synchronizing signal detector circuit comprises an input terminal for receiving a composite synchronizing signal including a horizontal synchronizing signal and a vertical synchronizing signal, an output terminal for providing a vertical synchronizing pulse synchronized with the vertical synchronizing signal, a clock pulse generator circuit connected to the input terminal and adapted to generate a clock pulse having half the period of the horizontal synchronizing signal and a phase lag therefrom of one-fourth the period thereof, a vertical synchronizing signal extractor circuit connected to the input terminal and the clock pulse generator circuit and adapted to compare the vertical synchronizing signal with a reference waveform pattern for the vertical synchronizing signal so as to generate a vertical synchronizing signal output synchronized with the vertical synchronizing signal only when the comparison results in a complete coincidence, and a vertical synchronizing signal compensator circuit connected to the vertical synchronizing signal extractor circuit and the clock pulse generator circuit and responsive to the vertical synchronizing signal output to provide this output at the output terminal and simultaneously store the same temporarily, the vertical synchronizing signal compensator circuit being also adapted to provide the stored vertical synchronizing signal output at the output terminal when the vertical synchronizing signal output is not received, whereby the vertical synchronizing pulse is produced at correct timing even if the vertical synchronizing signal is absent in the composite synchronizing signal because of a dropout or the like.
摘要翻译： 公开了一种与PCM记录/再现系统一起使用的垂直同步信号检测器电路，其通过使用家用VTR系统或其一部分来记录和再现具有脉冲编码调制的音频信号。 垂直同步信号检测电路包括：输入端子，用于接收包括水平同步信号和垂直同步信号的复合同步信号;输出端，用于提供与垂直同步信号同步的垂直同步脉冲;时钟脉冲发生器电路，连接到 所述输入端子适于产生具有所述水平同步信号的一半周期的时钟脉冲及其四分之一周期的相位滞后;垂直同步信号提取器电路，连接到所述输入端子和所述时钟脉冲发生器电路;以及 适于将垂直同步信号与用于垂直同步信号的参考波形图案进行比较，以便仅当比较导致完全符合时产生与垂直同步信号同步的垂直同步信号，并且垂直同步信号 l补偿电路连接到垂直同步信号提取器电路和时钟脉冲发生器电路，并且响应于垂直同步信号输出以在输出端提供该输出并同时暂时存储，垂直同步信号补偿器电路还适于 当没有接收到垂直同步信号输出时，在输出端提供所存储的垂直同步信号，由此，即使在复合同步信号中缺少垂直同步信号，因此在正确定时产生垂直同步脉冲， 喜欢。
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2.发明授权PCM Tape recording and reproducing apparatus having a dropout-immune data recording format 失效具有无辍学数据记录格式的PCM磁带记录和再现装置
公开(公告)号：US4539605A
公开(公告)日：1985-09-03
申请号：US416244
申请日：1982-09-09
申请人： Takashi Hoshino , Takao Arai , Keizo Nishimura
发明人： Takashi Hoshino , Takao Arai , Keizo Nishimura
CPC分类号： G11B20/1809
摘要： A PCM tape recording and reproducing apparatus for recording and reproducing an audio signal by using multitrack heads, comprises a frame interleaving device with a high dropout immunity function. The frame interleaving device comprises a distributor for successively distributing continuous interleaved input data between tracks, wihtin a multiplicity of tracks formed by splitting a magnetic tape, at a spacing of at least one track so that said continuous interleaved input data will not be shared between two continuous tracks in the same recording and reproducing direction, a data framing circuit for forming a frame out of data to be distributed to each of said tracks and for applying said frame with a synchronization signal at the top of said frame and with an error detection code at the end of said frame, and a delay circuit for delaying data associated with a track by one frame or more with respect to data associated with a neighboring track in the same recording and reproducing as said track.
摘要翻译： 用于通过使用多轨磁头来记录和再现音频信号的PCM磁带记录和再现装置包括具有高压差抗扰度功能的帧交错装置。 帧交织装置包括分配器，用于在轨道之间连续地分配连续的交错输入数据，该多个轨道以至少一个轨道的间隔分割磁带形成，以便所述连续的交错输入数据将不会在两个 在相同的记录和再现方向上的连续轨道，用于从要分配到每个所述轨道的数据形成帧并且用所述帧的顶部具有同步信号来应用所述帧的数据成帧电路，并具有错误检测码 在所述帧的结尾，以及延迟电路，用于相对于与所述轨道相同的记录和再现相关于与相邻轨道相关联的数据，将与轨道相关联的数据延迟一帧或更多。
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公开(公告)号：US4420775A
公开(公告)日：1983-12-13
申请号：US305779
申请日：1981-09-25
申请人： Shigeru Yamazaki , Takao Arai , Masaharu Kobayashi , Takashi Hoshino , Chitoshi Hibino , Harukuni Kobari
发明人： Shigeru Yamazaki , Takao Arai , Masaharu Kobayashi , Takashi Hoshino , Chitoshi Hibino , Harukuni Kobari
摘要： A circuit for protecting a horizontal synchronous signal comprises a horizontal synchronous signal detecting circuit responsive to horizontal synchronous pulses included in a composite synchronous signal of a reproduced PCM signal, first and second horizontal synchronous pulse supplementing or adding circuits and an output switching circuit. The output switching circuit operates so that the first supplementing circuit delivers a first supplementary pulse in the absence of a single pulse of the original horizontal synchronous signal, and the second supplementing circuit produces one or more second supplementary pulses in the absence of a plurality of continuous pulses of the original horizontal synchronous signal. When the circuit returns to a condition in which produced horizontal synchronous pulses are synchronous with the original horizontal synchronous pulses, the time interval between adjacent pulses of the original pulses is detected to see whether the interval is either longer or shorter than a predetermined value. As a result, when a pulse first appeared after the returning point is within the predetermined interval, that pulse is removed so that the number of output horizontal synchronous pulses is correct.
摘要翻译： 用于保护水平同步信号的电路包括水平同步信号检测电路，其响应包括在再现的PCM信号的复合同步信号中的水平同步脉冲，第一和第二水平同步脉冲补充或加法电路以及输出切换电路。 输出切换电路操作，使得第一补充电路在没有原始水平同步信号的单个脉冲的情况下传送第一辅助脉冲，并且第二补充电路在没有多个连续的情况下产生一个或多个第二辅助脉冲 原始水平同步信号的脉冲。 当电路返回到产生的水平同步脉冲与原始水平同步脉冲同步的状态时，检测原始脉冲的相邻脉冲之间的时间间隔，以查看间隔是否比预定值更长或更短。 结果，当在返回点之后首先出现脉冲在预定间隔内时，该脉冲被去除，使得输出水平同步脉冲的数量是正确的。
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公开(公告)号：US4393419A
公开(公告)日：1983-07-12
申请号：US305379
申请日：1981-09-24
申请人： Takao Arai , Takashi Hoshino , Masaharu Kobayashi
发明人： Takao Arai , Takashi Hoshino , Masaharu Kobayashi
IPC分类号： G11B3/00 , G11B5/09 , G11B7/00 , G11B7/003 , G11B7/005 , G11B20/06 , G11B20/10 , G11B20/12 , G11B20/20 , G11B27/30 , H04L7/08 , H04N5/932 , H04N5/04 , G11B27/10
CPC分类号： G11B20/10527 , G11B20/12 , G11B20/20 , G11B27/3027 , H04N5/932 , G11B2220/90
摘要： A PCM recording reproducing apparatus transforms the audio signal into PCM data for recording the signal as a PCM signal in the television signal format on the video tape used in VTR, and transforms the PCM signal reproduced in the VTR back into the audio signal. The PCM apparatus is provided with a sync signal detection protective circuit which ensure the detection of the sync signal in the reproduced PCM signal. The sync signal detection protective circuit selectively uses two kinds of time gate signals in consideration of skew noises and so on. When skew does not occur, the signal with a short gating duration is selected, and only when skew, dropout, jitter or the likes has occurred failing to sample the sync signal, the signal with a long gating duration is selected.
摘要翻译： PCM记录重放装置将音频信号转换为PCM数据，用于在VTR中使用的录像带上以电视信号格式将信号记录为PCM信号，并将在VTR中再现的PCM信号转换回音频信号。 PCM装置设置有同步信号检测保护电路，其确保在再现的PCM信号中检测同步信号。 同步信号检测保护电路考虑到偏斜噪声等选择性地使用两种时间门信号。 当不发生歪斜时，选择具有短门槛持续时间的信号，并且只有当发生歪斜，掉落，抖动或类似情况未能采样同步信号时，选择具有长选通持续时间的信号。
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公开(公告)号：US4491880A
公开(公告)日：1985-01-01
申请号：US421401
申请日：1982-09-22
摘要： In a magnetic recording and reproducing apparatus of 2-head helical scan type, an overlapping portion is formed at one end of each video track on a magnetic tape, and a PCM audio signal is recorded on this overlapping portion. Video/audio selective switching circuits are disposed on the input or output side of video and audio recording amplifiers, and video/audio selective switching circuits and video/audio playback equalizer circuits are disposed on the output side of video and audio playback amplifiers. Each of the heads acts as both of a video head and an audio head.
摘要翻译： 在2磁头螺旋扫描型的磁记录和再现装置中，在磁带上的每个视频磁道的一端形成重叠部分，并且PCM音频信号被记录在该重叠部分上。 视频/音频选择开关电路设置在视频和音频记录放大器的输入或输出侧，并且视频/音频选择开关电路和视频/音频重放均衡器电路设置在视频和音频播放放大器的输出侧。 每个头都用作视频头和音频头。
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公开(公告)号：US4367499A
公开(公告)日：1983-01-04
申请号：US301133
申请日：1981-09-11
申请人： Takashi Hoshino , Takao Arai
发明人： Takashi Hoshino , Takao Arai
CPC分类号： G11B27/3018 , G11B15/005 , G11B15/026
摘要： An address on a magnetic tape to be searched and a current address of the magnetic tape which is read by playing back the tape are supplied to first arithmetic operation means to produce a signal indicative of the tape length to be fast moved and a signal indicative of the direction of the fast tape movement so that the tape is fast moved in the selected direction in response to the derived direction signal. Second arithmetic operation means watches address pitch signals produced during the fast tape movement and the tape length to be fast moved derived from the first arithmetic operation means, to release the fast tape movement when the predetermined length of tape has been fast moved.
摘要翻译： 要搜索的磁带上的地址和通过重放磁带读取的磁带的当前地址被提供给第一算术运算装置，以产生指示要快速移动的磁带长度的信号和指示 快速磁带移动的方向，使得磁带响应于导出的方向信号而沿所选择的方向快速移动。 第二算术运算装置是指在快速磁带移动期间产生的地址音调信号和从第一算术运算装置得到的要快速移动的磁带长度，以便在预定长度的磁带已快速移动时释放快速磁带移动。
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公开(公告)号：US4590524A
公开(公告)日：1986-05-20
申请号：US553234
申请日：1983-11-18
CPC分类号： G11B20/10527 , G11B5/035
摘要： A multitrack PCM reproducing apparatus for reproducing PCM signals recorded on a plurality of tracks in a distributed relation, comprises a signal selector circuit sequentially selecting the PCM signals reproduced from the individual tracks, an A/D converter converting the reproduced signals selected by the signal selector circuit into digital signals, a memory circuit storing the digital signals obtained by the A/D conversion, a single digital filter equalizing for each track the waveform of the digital signals stored in the memory circuit, and a signal processor circuit demodulating the PCM signals on the basis of the digital signals processed by the digital filter.
摘要翻译： 一种用于再现以分布式关系记录在多个磁道上的PCM信号的多轨PCM再现装置，包括顺序地选择从各个磁道再现的PCM信号的信号选择器电路，A / D转换器转换由信号选择器选择的再现信号 电路转换为数字信号，存储电路，存储通过A / D转换获得的数字信号，对于每个轨道平均存储在存储器电路中的数字信号的波形的单个数字滤波器以及解调PCM信号的信号处理器电路 数字滤波器处理的数字信号的基础。
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公开(公告)号：US4497055A
公开(公告)日：1985-01-29
申请号：US386580
申请日：1982-06-09
申请人： Takashi Hoshino , Takao Arai
发明人： Takashi Hoshino , Takao Arai
CPC分类号： G11B20/1876
摘要： Errors in input data are concealed by interpolation using a mean value and the previous word which are automatically interchanged in accordance with the conditions of occurrence of errors. A series of data words in the input data is first modified into a form in which when the input word is erroneous it is replaced by correct input word immediately preceding the erroneous word. Then, in association with each word in the modified data word series a mean value between words immediately before and after that word or between that word and a word thereafter is produced, and if that word is the replaced word it is further replaced by the mean value produced in association with that data. Thus, an independent error is concealed by a mean value between the correct word immediately before and after the erroneous word while continuous errors are concealed in such a manner that the last erroneous word is replaced by the mean value between correct words occurring immediately before and after the continuous erroneous words and the other erroneous words are all replaced by the correct word occurring immediately before the continuous erroneous words.
摘要翻译： 通过使用平均值的内插隐藏输入数据中的错误，并且根据错误发生的条件自动地互换前一个字。 输入数据中的一系列数据字首先被修改为当输入字错误时被紧接在错误字之前的正确输入字代替的形式。 然后，与修改的数据字序列中的每个单词相关联，产生紧接在该单词之前或之后的单词之间或之后的单词和单词之间的平均值，并且如果该单词是替换的单词，则进一步被平均值 与该数据相关产生的价值。 因此，通过在错误字之前和之后的正确单词之间的平均值隐藏独立的错误，而连续错误被隐藏，使得最后一个错误字被替换为紧邻前后的正确字之间的平均值 连续错误的单词和其他错误的单词全部被紧接在连续的错误单词之前出现的正确的单词所替代。
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公开(公告)号：US4309726A
公开(公告)日：1982-01-05
申请号：US154023
申请日：1980-05-28
申请人： Hiromichi Tanaka , Takashi Hoshino , Takao Arai
发明人： Hiromichi Tanaka , Takashi Hoshino , Takao Arai
CPC分类号： G11B20/1813
摘要： Digital data units representative of analog audio signal are constructed into a data unit sequence with an error detection code being added to each of the data units for detecting coding errors within the data unit, and data synchronizing signals are inserted one for every predetermined interval of the data unit sequence to constitute a PCM data sequence, which is recorded and reproduced. The number of times of coding errors detected within the data unit by the error detection code during the time period between one data synchronizing signal and the next following data synchronizing signal is monitored and when the number exceeds a first predetermined count, the audio output is muted, and when the number decreases below a second predetermined count which is much smaller than the first predetermined count, the muting mode of the audio output is released to prevent the noise output.
摘要翻译： 表示模拟音频信号的数字数据单元被构造成数据单元序列，其中将错误检测码添加到每个数据单元中，以检测数据单元内的编码错误，并且每个预定的间隔插入数据同步信号 数据单元序列以构成PCM数据序列，其被记录和再现。 监视在一个数据同步信号和下一个跟随数据同步信号之间的时间段期间通过错误检测码在数据单元内检测到的编码错误的次数，并且当数量超过第一预定计数时，音频输出被静音 ，并且当数量减少到比第一预定计数小得多的第二预定计数时，释放音频输出的静音模式以防止噪声输出。
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公开(公告)号：US4682152A
公开(公告)日：1987-07-21
申请号：US368868
申请日：1982-04-15
申请人： Hiroo Okamoto , Takao Arai , Takashi Hoshino
发明人： Hiroo Okamoto , Takao Arai , Takashi Hoshino
摘要： Digital companding without range bits involves comparison of a digital input with predetermined boundaries separating a plurality of numerical ranges, detection of a numerical range to which the digital input belongs, generation of an off-set unique to each numerical range, bit-shifting of the digital input, and addition of the bit-shifted input with the generated off-set to provide a companded digital output which is in one-to-one correspondence to the digital input. The off-set values are stored in a memory.
摘要翻译： 没有范围位的数字压扩包括将数字输入与划分多个数字范围的预定边界进行比较，数字输入所属的数值范围的检测，每个数值范围唯一的偏移的产生，位移 数字输入以及将所产生的偏移量与位移输入相加以提供与数字输入一一对应的压缩数字输出。 偏移值存储在存储器中。
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