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公开(公告)号:US20220415917A1
公开(公告)日:2022-12-29
申请号:US17822708
申请日:2022-08-26
Applicant: Micron Technology, Inc.
Inventor: Daniel Billingsley , Matthew J. King , Jordan D. Greenlee , Yongjun J. Hu , Tom George , Amritesh Rai , Sidhartha Gupta , Kyle A. Ritter
IPC: H01L27/11573 , H01L27/11582 , H01L27/11556 , H01L21/28 , H01L29/49 , H01L27/11529
Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.
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公开(公告)号:US20230389314A1
公开(公告)日:2023-11-30
申请号:US17879140
申请日:2022-08-02
Applicant: Micron Technology, Inc
Inventor: Adam Barton , David H. Wells , Pengyuan Zheng , Amritesh Rai
IPC: H01L27/11582 , G11C16/04 , H01L23/522 , H01L23/528 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/11565 , H01L27/1157
CPC classification number: H01L27/11582 , G11C16/0483 , H01L23/5226 , H01L23/5283 , H01L27/11519 , H01L27/11524 , H01L27/11556 , H01L27/11565 , H01L27/1157
Abstract: A method used in forming a memory array comprises forming a stack comprising vertically-alternating insulative tiers and conductive tiers. Channel-material strings of memory-cell strings extend through the insulative and conductive tiers. Conductive vias are formed above and individually directly electrically coupled to individual of the channel-material strings. Digitlines are formed above and are individually directly electrically coupled to a plurality of individual of the conductive vias there-below. The forming of the digitlines comprises forming lower elemental-form tungsten directly against tops of the individual conductive vias. The lower elemental-form tungsten is exposed to oxygen-containing gas or plasma to form WOx, where “x” is greater than 0 and no more than 3.0. The WOx has a maximum thickness greater than 0 and no more than 30 Angstroms in a finished construction. Upper elemental-form tungsten is physical vapor deposited directly against the WOx. Other embodiments, including structure, are disclosed.
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公开(公告)号:US20230397423A1
公开(公告)日:2023-12-07
申请号:US18307698
申请日:2023-04-26
Applicant: Micron Technology, Inc.
Inventor: Pengyuan Zheng , Yongjun J. Hu , Pavan Reddy Kumar Aella , David Ross Economy , Brittany L. Kohoutek , Amritesh Rai
IPC: H10B43/27
CPC classification number: H10B43/27
Abstract: A method of forming a microelectronic device includes forming conductive interconnect structures vertically extending through isolation material to conductive contact structures coupled to pillar structures, forming a metal silicide material on the interconnect structures and the first isolation material, forming a conductive material on the metal silicide material, and forming a dielectric material over the conductive material. The method further includes forming openings vertically extending through the dielectric material, the conductive material, the metal silicide material, and the isolation material and forming additional isolation material to extend over remaining portions of the dielectric material and at least partially fill the openings. Related devices and systems are disclosed.
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公开(公告)号:US12171101B2
公开(公告)日:2024-12-17
申请号:US17822708
申请日:2022-08-26
Applicant: Micron Technology, Inc.
Inventor: Daniel Billingsley , Matthew J. King , Jordan D. Greenlee , Yongjun J. Hu , Tom George , Amritesh Rai , Sidhartha Gupta , Kyle A. Ritter
Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.
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公开(公告)号:US11527546B2
公开(公告)日:2022-12-13
申请号:US16943826
申请日:2020-07-30
Applicant: Micron Technology, Inc.
Inventor: Daniel Billingsley , Matthew J. King , Jordan D. Greenlee , Yongjun J. Hu , Tom George , Amritesh Rai , Sidhartha Gupta , Kyle A. Ritter
IPC: H01L27/11556 , H01L27/11573 , H01L27/11582 , H01L21/28 , H01L29/49 , H01L27/11529
Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.
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公开(公告)号:US20220037350A1
公开(公告)日:2022-02-03
申请号:US16943826
申请日:2020-07-30
Applicant: Micron Technology, Inc.
Inventor: Daniel Billingsley , Matthew J. King , Jordan D. Greenlee , Yongjun J. Hu , Tom George , Amritesh Rai , Sidhartha Gupta , Kyle A. Ritter
IPC: H01L27/11573 , H01L27/11582 , H01L27/11556 , H01L27/11529 , H01L29/49 , H01L21/28
Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.
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