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1.
公开(公告)号:US11728263B2
公开(公告)日:2023-08-15
申请号:US17681377
申请日:2022-02-25
Applicant: Micron Technology, Inc.
Inventor: Naveen Kaushik , Yoshihiko Kamata , Richard J. Hill , Kyle A. Ritter , Tomoko Ogura Iwasaki , Haitao Liu
IPC: H01L23/522 , H10B41/27 , H10B41/35 , H10B43/27 , H10B43/35
CPC classification number: H01L23/5225 , H01L23/5226 , H10B41/27 , H10B41/35 , H10B43/27 , H10B43/35
Abstract: Some embodiments include an assembly having channel-material-structures, and having memory cells along the channel-material-structures. The memory cells include charge-storage-material. Linear-conductive-structures are vertically offset from the channel-material-structures and are electrically coupled with the channel-material-structures. Intervening regions are between the linear-conductive-structures. Conductive-shield-structures are within the intervening regions. The conductive-shield-structures are electrically coupled with a reference-voltage-source.
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公开(公告)号:US20220415917A1
公开(公告)日:2022-12-29
申请号:US17822708
申请日:2022-08-26
Applicant: Micron Technology, Inc.
Inventor: Daniel Billingsley , Matthew J. King , Jordan D. Greenlee , Yongjun J. Hu , Tom George , Amritesh Rai , Sidhartha Gupta , Kyle A. Ritter
IPC: H01L27/11573 , H01L27/11582 , H01L27/11556 , H01L21/28 , H01L29/49 , H01L27/11529
Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.
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公开(公告)号:US11456208B2
公开(公告)日:2022-09-27
申请号:US16990463
申请日:2020-08-11
Applicant: Micron Technology, Inc.
Inventor: Sidhartha Gupta , David Ross Economy , Richard J. Hill , Kyle A. Ritter , Naveen Kaushik
IPC: H01L21/768 , H01L23/522 , H01L23/528 , H01L23/532 , H01L27/11582 , H01L27/11556
Abstract: A method of forming an apparatus includes forming pillar structures extending vertically through a first isolation material, forming conductive lines operatively coupled to the pillar structures, forming dielectric structures overlying the conductive lines, and forming air gaps between neighboring conductive lines. The air gaps are laterally adjacent to the conductive lines with a portion of the air gaps extending above a plane of an upper surface of the laterally adjacent conductive lines and a portion of the air gaps extending below a plane of a lower surface of the laterally adjacent conductive lines. Apparatuses, memory devices, methods of forming a memory device, and electronic systems are also disclosed.
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4.
公开(公告)号:US20220013450A1
公开(公告)日:2022-01-13
申请号:US16924506
申请日:2020-07-09
Applicant: Micron Technology, Inc.
Inventor: Naveen Kaushik , Yoshihiko Kamata , Richard J. Hill , Kyle A. Ritter , Tomoko Ogura Iwasaki , Haitao Liu
IPC: H01L23/522 , H01L27/11524 , H01L27/11556 , H01L27/1157 , H01L27/11582
Abstract: Some embodiments include an assembly having channel-material-structures, and having memory cells along the channel-material-structures. The memory cells include charge-storage-material. Linear-conductive-structures are vertically offset from the channel-material-structures and are electrically coupled with the channel-material-structures. Intervening regions are between the linear-conductive-structures. Conductive-shield-structures are within the intervening regions. The conductive-shield-structures are electrically coupled with a reference-voltage-source.
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公开(公告)号:US11903196B2
公开(公告)日:2024-02-13
申请号:US17127971
申请日:2020-12-18
Applicant: Micron Technology, Inc.
Inventor: Yoshiaki Fukuzumi , Jun Fujiki , Matthew J. King , Sidhartha Gupta , Paolo Tessariol , Kunal Shrotri , Kye Hyun Baek , Kyle A. Ritter , Shuji Tanaka , Umberto Maria Meotto , Richard J. Hill , Matthew Holland
Abstract: A microelectronic device comprises a stack structure comprising a stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers, the stack structure divided into block structures separated from one another by slot structures, strings of memory cells vertically extending through the block structures of the stack structure, the strings of memory cells individually comprising a channel material vertically extending through the stack structure, an additional stack structure vertically overlying the stack structure and comprising a vertical sequence of additional conductive structures and additional insulative structures arranged in additional tiers, first pillars extending through the additional stack structure and vertically overlying the strings of memory cells, each of the first pillars horizontally offset from a center of a corresponding string of memory cells, second pillars extending through the additional stack structure and vertically overlying the strings of memory cells, and additional slot structures comprising a dielectric material extending through at least a portion of the additional stack structure and sub-dividing each of the block structures into sub-block structures, the additional slot structures horizontally neighboring the first pillars. Related microelectronic devices, electronic systems, and methods are also described.
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公开(公告)号:US20220238546A1
公开(公告)日:2022-07-28
申请号:US17158259
申请日:2021-01-26
Applicant: Micron Technology, Inc.
Inventor: Sidhartha Gupta , Naveen Kaushik , Pankaj Sharma , Kyle A. Ritter
IPC: H01L27/11582 , H01L27/11556 , H01L27/11519 , H01L27/11565
Abstract: Some embodiments include an integrated assembly having a channel-material-pillar extending vertically through a stack of alternating conductive levels and insulative levels. The channel-material-pillar includes a first semiconductor material. A second semiconductor material is directly against an upper region of the channel-material-pillar. The second semiconductor material has a higher dopant concentration than the first semiconductor material and joins to the first semiconductor along an abrupt interfacial region such that there is little to no mixing of dopant from the second semiconductor material into the first semiconductor material. Some embodiments include methods of forming integrated assemblies.
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7.
公开(公告)号:US11302628B2
公开(公告)日:2022-04-12
申请号:US16924506
申请日:2020-07-09
Applicant: Micron Technology, Inc.
Inventor: Naveen Kaushik , Yoshihiko Kamata , Richard J. Hill , Kyle A. Ritter , Tomoko Ogura Iwasaki , Haitao Liu
IPC: H01L23/522 , H01L27/11524 , H01L27/1157 , H01L27/11582 , H01L27/11556
Abstract: Some embodiments include an assembly having channel-material-structures, and having memory cells along the channel-material-structures. The memory cells include charge-storage-material. Linear-conductive-structures are vertically offset from the channel-material-structures and are electrically coupled with the channel-material-structures. Intervening regions are between the linear-conductive-structures. Conductive-shield-structures are within the intervening regions. The conductive-shield-structures are electrically coupled with a reference-voltage-source.
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公开(公告)号:US12171101B2
公开(公告)日:2024-12-17
申请号:US17822708
申请日:2022-08-26
Applicant: Micron Technology, Inc.
Inventor: Daniel Billingsley , Matthew J. King , Jordan D. Greenlee , Yongjun J. Hu , Tom George , Amritesh Rai , Sidhartha Gupta , Kyle A. Ritter
Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.
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公开(公告)号:US20240357809A1
公开(公告)日:2024-10-24
申请号:US18637129
申请日:2024-04-16
Applicant: Micron Technology, Inc.
Inventor: Zeyar Lin Aung , Kaiming Luo , Saurabh Jagdishbhai Kasodariya , Sumeet C. Pandey , Brittany L. Kohoutek , Yuwei Ma , Kyle A. Ritter
IPC: H10B43/20
CPC classification number: H10B43/20
Abstract: Methods, systems, and devices for support structures for tier deflection in a memory system are described. The memory system may include a word line contact that extends through a stack of materials and lands on a tier of a word line. The word line contact may be between four support structures that form a diamond around the word line contact. Two support structures that form opposite vertices of the diamond may align centrally with the word line contact in a lateral direction and two other support structures that form opposite vertices of the diamond may align centrally with the word line contact in a longitudinal direction.
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公开(公告)号:US11527546B2
公开(公告)日:2022-12-13
申请号:US16943826
申请日:2020-07-30
Applicant: Micron Technology, Inc.
Inventor: Daniel Billingsley , Matthew J. King , Jordan D. Greenlee , Yongjun J. Hu , Tom George , Amritesh Rai , Sidhartha Gupta , Kyle A. Ritter
IPC: H01L27/11556 , H01L27/11573 , H01L27/11582 , H01L21/28 , H01L29/49 , H01L27/11529
Abstract: A microelectronic device comprises a stack structure comprising alternating conductive structures and insulative structures arranged in tiers, each of the tiers individually comprising a conductive structure and an insulative structure, strings of memory cells vertically extending through the stack structure, the strings of memory cells comprising a channel material vertically extending through the stack structure, and another stack structure vertically overlying the stack structure and comprising other tiers of alternating levels of other conductive structures and other insulative structures, the other conductive structures exhibiting a conductivity greater than a conductivity of the conductive structures of the stack structure. Related memory devices, electronic systems, and methods are also described.
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