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公开(公告)号：US20230329612A1
公开(公告)日：2023-10-19
申请号：US17720770
申请日：2022-04-14
Applicant: Micron Technology, Inc.
Inventor： Lisa R. Copenspire-Ross , Nkiruka Christian , Trupti D. Gawai , Josephine T. Hamada , Anda C. Mocuta
CPC classification number: A61B5/18 , A61B5/7267 , A61B5/0022 , A61B5/6893 , B60R25/25 , B60W60/0051 , G16H40/63 , B60W2556/65 , B60W2540/221 , B60W2540/223 , B60W2540/225 , B60W2540/21
Abstract: Methods, devices, and systems related to determining driver capability are described. In an example, a method can include receiving, at a computing device, data associated with a driver from a sensor, inputting the data into an artificial intelligence (AI) model, performing an AI operation using the AI model, and determining whether the driver is capable of driving a vehicle based on an output of the AI model.
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公开(公告)号：US20210005254A1
公开(公告)日：2021-01-07
申请号：US16460863
申请日：2019-07-02
Applicant: Micron Technology, Inc.
Inventor： Josephine T. Hamada , Mingdong Cui , Joseph M. McCrate , Karthik Sarpatwari , Jessica Chen
Abstract: Methods, systems, and devices for memory cell selection to enable a memory device to select a targeted memory cell during a write operation are described. The memory device may apply a first pulse to a selected bit line of the targeted memory cell while applying a voltage to deselected word lines to prevent current leakage. If the targeted memory is not selected after the first pulse, the memory device may apply a second pulse to the selected bit line while applying a voltage to the deselected word lines. If the targeted memory cell is not selected following the second pulse, the memory device may apply a third pulse to the selected bit line while applying the voltage to the deselected word lines. The memory device may detect a snapback event after any of the pulses if the targeted memory cell is selected.
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公开(公告)号：US11367483B2
公开(公告)日：2022-06-21
申请号：US17089146
申请日：2020-11-04
Applicant: Micron Technology, Inc.
Inventor： Josephine T. Hamada , Mingdong Cui , Joseph M. McCrate , Karthik Sarpatwari , Jessica Chen
Abstract: Methods, systems, and devices for memory cell selection to enable a memory device to select a targeted memory cell during a write operation are described. The memory device may apply a first pulse to a selected bit line of the targeted memory cell while applying a voltage to deselected word lines to prevent current leakage. If the targeted memory is not selected after the first pulse, the memory device may apply a second pulse to the selected bit line while applying a voltage to the deselected word lines. If the targeted memory cell is not selected following the second pulse, the memory device may apply a third pulse to the selected bit line while applying the voltage to the deselected word lines. The memory device may detect a snapback event after any of the pulses if the targeted memory cell is selected.
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公开(公告)号：US20210151107A1
公开(公告)日：2021-05-20
申请号：US17089146
申请日：2020-11-04
Applicant: Micron Technology, Inc.
Inventor： Josephine T. Hamada , Mingdong Cui , Joseph M. McCrate , Karthik Sarpatwari , Jessica Chen
Abstract: Methods, systems, and devices for memory cell selection to enable a memory device to select a targeted memory cell during a write operation are described. The memory device may apply a first pulse to a selected bit line of the targeted memory cell while applying a voltage to deselected word lines to prevent current leakage. If the targeted memory is not selected after the first pulse, the memory device may apply a second pulse to the selected bit line while applying a voltage to the deselected word lines. If the targeted memory cell is not selected following the second pulse, the memory device may apply a third pulse to the selected bit line while applying the voltage to the deselected word lines. The memory device may detect a snapback event after any of the pulses if the targeted memory cell is selected.
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