公开(公告)号：US20230367575A1

公开(公告)日：2023-11-16

申请号：US17744350

申请日：2022-05-13

Applicant: Micron Technology, Inc.

Inventor： Niccolo Izzo ,  Alessandro Orlando ,  Danilo Caraccio ,  David Hulton

IPC: G06F8/65 ,  H04L9/08

CPC classification number: G06F8/65 ,  H04L9/088

Abstract: Methods, systems, and devices for techniques for managing offline identity upgrades are described. A memory system may receive a command to update a device identifier for a device identifier composition engine (DICE) associated with the memory system. The memory system may generate an updated device identifier, at a first software layer of a set of software layers of the DICE, based on receiving the command. The memory system may decrypt a device specific key (DSK) stored at a read-only memory device of the memory system based on the received command, and sign the updated device identifier using the DSK based on decrypting the DSK. The memory system may execute one or more operations associated with the first software layer of the set of software layers of the DICE based on the signed updated device identifier.

公开(公告)号：US20250013458A1

公开(公告)日：2025-01-09

申请号：US18894289

申请日：2024-09-24

Applicant: Micron Technology, Inc.

Inventor： Niccolo Izzo ,  Alessandro Orlando ,  Danilo Caraccio ,  David Hulton

IPC: G06F8/65 ,  H04L9/08

Abstract: Methods, systems, and devices for techniques for managing offline identity upgrades are described. A memory system may receive a command to update a device identifier for a device identifier composition engine (DICE) associated with the memory system. The memory system may generate an updated device identifier, at a first software layer of a set of software layers of the DICE, based on receiving the command. The memory system may decrypt a device specific key (DSK) stored at a read-only memory device of the memory system based on the received command, and sign the updated device identifier using the DSK based on decrypting the DSK. The memory system may execute one or more operations associated with the first software layer of the set of software layers of the DICE based on the signed updated device identifier.

公开(公告)号：US12124833B2

公开(公告)日：2024-10-22

申请号：US17744350

申请日：2022-05-13

Applicant: Micron Technology, Inc.

Inventor： Niccolo Izzo ,  Alessandro Orlando ,  Danilo Caraccio ,  David Hulton

IPC: G06F8/65 ,  H04L9/08

CPC classification number: G06F8/65 ,  H04L9/088

Abstract: Methods, systems, and devices for techniques for managing offline identity upgrades are described. A memory system may receive a command to update a device identifier for a device identifier composition engine (DICE) associated with the memory system. The memory system may generate an updated device identifier, at a first software layer of a set of software layers of the DICE, based on receiving the command. The memory system may decrypt a device specific key (DSK) stored at a read-only memory device of the memory system based on the received command, and sign the updated device identifier using the DSK based on decrypting the DSK. The memory system may execute one or more operations associated with the first software layer of the set of software layers of the DICE based on the signed updated device identifier.

公开(公告)号：US11797717B2

公开(公告)日：2023-10-24

申请号：US16765224

申请日：2019-05-21

Applicant: Micron Technology, Inc.

Inventor： Paolo Amato ,  Marco Sforzin ,  Daniele Balluchi ,  Danilo Caraccio ,  Niccolo Izzo

IPC: G06F21/85 ,  G06F12/02 ,  G06F21/60 ,  G06F21/79 ,  G06F12/14

CPC classification number: G06F21/85 ,  G06F12/0246 ,  G06F12/1408 ,  G06F21/602 ,  G06F21/79

Abstract: The present disclosure relates to apparatuses and methods for memory management. The disclosure further relates to an interface protocol for flash memory devices including at least a memory array and a memory controller coupled to the memory array.
A host device is coupled to the memory device through a communication channel and a hardware and/or software full encryption-decryption scheme is adopted in the communication channel for data, addresses and commands exchanged between the host device and the memory array.

公开(公告)号：US12230311B2

公开(公告)日：2025-02-18

申请号：US17941655

申请日：2022-09-09

Applicant: Micron Technology, Inc.

Inventor： Edmund Gieske ,  Cagdas Dirik ,  Robert M. Walker ,  Sujeet Ayyapureddi ,  Niccolo Izzo ,  Markus Geiger ,  Yang Lu ,  Ameen Akel ,  Elliott C. Cooper-Balis ,  Danilo Caraccio

IPC: G11C7/00 ,  G11C11/406 ,  G11C29/52

Abstract: An energy-efficient and area-efficient, mitigation of errors in a memory media device that are caused by row hammer attacks and the like is described. The detection of errors is deterministically performed while maintaining, in an SRAM, a number of row access counters that is smaller than the total number of rows protected in the memory media device. The reduction of the number of required counters is achieved by aliasing a plurality of rows that are being protected to each counter. The mitigation may be implemented on a per-bank basis, per-channel basis or per-memory media device basis. The memory media device may be DRAM.

公开(公告)号：US20210406411A1

公开(公告)日：2021-12-30

申请号：US16765224

申请日：2019-05-21

Applicant: Micron Technology, Inc.

Inventor： Paolo Amato ,  Marco Sforzin ,  Daniele Balluchi ,  Danilo Caraccio ,  Niccolo Izzo

IPC: G06F21/85 ,  G06F21/79 ,  G06F21/60 ,  G06F12/02

Abstract: The present disclosure relates to apparatuses and methods for memory management. The disclosure further relates to an interface protocol for flash memory devices including at least a memory array and a memory controller coupled to the memory array.
A host device is coupled to the memory device through a communication channel and a hardware and/or software full encryption-decryption scheme is adopted in the communication channel for data, addresses and commands exchanged between the host device and the memory array.