公开(公告)号：US10546691B2

公开(公告)日：2020-01-28

申请号：US15888351

申请日：2018-02-05

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Noriyuki Inoue ,  Takeo Arakawa ,  Kensuke Aoki ,  Hiromasa Saeki ,  Koichi Kanryo ,  Akihiro Tsuru ,  Haruhiko Mori

IPC: H01G4/30 ,  H01G4/06

Abstract: A capacitor that includes a conductive base material with high specific surface area, a dielectric layer covering the conductive base material with high specific surface area, and an upper electrode covering the dielectric layer, in which the conductive base material with high specific surface area is formed of a metal sintered body as a whole.

公开(公告)号：US20180151297A1

公开(公告)日：2018-05-31

申请号：US15864534

申请日：2018-01-08

Applicant: Murata Manufacturing Co., Ltd.

Inventor： KAZUO HATTORI ,  Noriyuki Inoue ,  Hiromasa Saeki ,  Kensuke Aoki ,  Ken Ito

IPC: H01G4/12 ,  H01G4/33 ,  H01G4/38 ,  H01G4/005 ,  H01G9/045 ,  H01G9/055 ,  H01G9/07

CPC classification number: H01G4/12 ,  H01G4/005 ,  H01G4/33 ,  H01G4/38 ,  H01G9/012 ,  H01G9/0425 ,  H01G9/045 ,  H01G9/055 ,  H01G9/07 ,  H01G9/15

Abstract: A capacitor having a conductive porous substrate with at least two electrostatic capacitance forming sections, each of the at least two electrostatic capacitance forming sections including a porous portion of the conductive porous substrate, a dielectric layer on the porous portion, and an upper electrode on the dielectric layer. The at least two electrostatic capacitance forming sections are electrically connected in series by the conductive porous substrate.

公开(公告)号：US10658111B2

公开(公告)日：2020-05-19

申请号：US15864534

申请日：2018-01-08

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kazuo Hattori ,  Noriyuki Inoue ,  Hiromasa Saeki ,  Kensuke Aoki ,  Ken Ito

IPC: H01G4/33 ,  H01G4/38 ,  H01G4/005 ,  H01G9/045 ,  H01G9/055 ,  H01G9/07 ,  H01G9/042 ,  H01G9/15 ,  H01G9/012

Abstract: A capacitor having a conductive porous substrate with at least two electrostatic capacitance forming sections, each of the at least two electrostatic capacitance forming sections including a porous portion of the conductive porous substrate, a dielectric layer on the porous portion, and an upper electrode on the dielectric layer. The at least two electrostatic capacitance forming sections are electrically connected in series by the conductive porous substrate.

公开(公告)号：US10903004B2

公开(公告)日：2021-01-26

申请号：US15872239

申请日：2018-01-16

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kensuke Aoki

IPC: H01G4/01 ,  H01G4/012 ,  H01G4/10 ,  H01G4/06 ,  H01G4/33 ,  H01G4/228 ,  H01G4/08 ,  H01G9/15 ,  H01G9/052 ,  H01G9/08 ,  H01G9/00 ,  H01G9/032 ,  H01G9/07

Abstract: The present invention provides a capacitor including a conductive porous base material with a porous part, a dielectric layer and an upper electrode. The porous part, the dielectric layer, and the upper electrode are stacked on top of one another in this order to define a capacitance formation part. The capacitance format ion part is not present at a lateral end part of the porous part.

公开(公告)号：US20180158610A1

公开(公告)日：2018-06-07

申请号：US15888351

申请日：2018-02-05

Applicant: Murata Manufacturing Co., Ltd.

Inventor： NORIYUKI INOUE ,  Takeo Arakawa ,  Kensuke Aoki ,  Hiromasa Saeki ,  Koichi Kanryo ,  Akihiro Tsuru ,  Haruhiko Mori

IPC: H01G4/06 ,  H01G4/30

Abstract: A capacitor that includes a conductive base material with high specific surface area, a dielectric layer covering the conductive base material with high specific surface area, and an upper electrode covering the dielectric layer, in which the conductive base material with high specific surface area is formed of a metal sintered body as a whole.