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公开(公告)号：US20240396532A1
公开(公告)日：2024-11-28
申请号：US18696599
申请日：2021-09-29
Applicant: NXP B.V.
Inventor： Maël Demarets , Gerard Villar Piqué , Sander Derksen , Fabio Sebastiano
IPC: H03K3/03
Abstract: A controllable oscillator including an upper oscillator coupled between an upper supply voltage and an upper intermediate node that provides at least one upper oscillating signal on at least one upper oscillating node, a lower oscillator coupled between a lower intermediate node and a lower supply voltage that provides at least one lower oscillating signal on at least one lower oscillating node, an oscillation controller coupled between the upper and lower intermediate nodes, and amplification circuitry coupled between the upper and lower supply voltages, having at least one upper input coupled to the at least one upper oscillating node, having at least one lower input coupled to the at least one lower oscillating node, and having a primary output node for providing a primary rail-to-rail oscillation signal. A coupling circuit may be coupled between one or more upper and lower oscillating nodes for synchronization.
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公开(公告)号：US09939496B2
公开(公告)日：2018-04-10
申请号：US14716595
申请日：2015-05-19
Applicant: NXP B.V.
Inventor： Edwin Schapendonk , Pieter Van Der Zee , Fabio Sebastiano , Robert Van Veldhoven
CPC classification number: G01R33/0023 , G01D5/145 , G01D5/16 , G01D18/004 , G01R33/09
Abstract: A sensor system is disclosed. The sensor system includes a first sensor path comprising a first sensing element and a second sensing element being connected in series between a first supply terminal and a second supply terminal and an intermediate node connected in between the first supply terminal and the second supply terminal, a second sensor path comprising a third sensing element and a fourth sensing element connected in series between the first supply terminal and the second supply terminal, a first reference node connected in between the first supply terminal and the second supply terminal, and a second reference node connected in between the first supply terminal and the second supply terminal, and a processing unit to receive an input signal from the intermediate node, a first reference signal from the first reference node, and a second reference signal from the second reference node.
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3.发明授权A/D converter input stage providing high linearity and gain matching between multiple channels 有权A / D转换器输入级提供多个通道之间的高线性度和增益匹配公开(公告)号：US09154149B2
公开(公告)日：2015-10-06
申请号：US14553721
申请日：2014-11-25
Applicant: NXP B.V.
Abstract: An input stage for an A/D converter includes a transconductance element adapted to receive, at a first input of the transconductance element, an analog input signal that is to be converted to a digital signal by the A/D converter, a feedback path for providing an analog feedback signal to a second input of the transconductance element, the analog feedback signal being based on a digital output signal of the A/D converter, and an integrator for integrating an output current of the transconductance element, wherein the integrating element is adapted to generate an integrator output signal representative of the integrated output current. The input stage may be included in an A/D converter. A plurality of such A/D converters may be included in a system.
Abstract translation: 用于A / D转换器的输入级包括跨导元件，其适于在所述跨导元件的第一输入处接收由所述A / D转换器转换为数字信号的模拟输入信号，所述反馈路径用于 向所述跨导元件的第二输入端提供模拟反馈信号，所述模拟反馈信号基于所述A / D转换器的数字输出信号，以及用于积分所述跨导元件的输出电流的积分器，其中所述积分元件为 适于产生表示积分输出电流的积分器输出信号。 输入级可以包括在A / D转换器中。 多个这样的A / D转换器可以包括在系统中。
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4.发明申请A/D CONVERTER INPUT STAGE PROVIDING HIGH LINEARITY AND GAIN MATCHING BETWEEN MULTIPLE CHANNELS 有权A / D转换器输入级提供多通道之间的高线性和增益匹配公开(公告)号：US20150171882A1
公开(公告)日：2015-06-18
申请号：US14553721
申请日：2014-11-25
Applicant: NXP B.V.
IPC: H03M1/12
Abstract: There is described an input stage for an A/D converter, comprising a transconductance element adapted to receive, at a first input of the transconductance element, an analog input signal that is to be converted to a digital signal by the A/D converter, a feedback path for providing an analog feedback signal to a second input of the transconductance element, the analog feedback signal being based on a digital output signal of the A/D converter, and an integrator for integrating an output current of the transconductance element, wherein the integrating element is adapted to generate an integrator output signal representative of the integrated output current. There is also described an A/D converter comprising such an input stage and a system comprising a plurality of such A/D converters.
Abstract translation: 描述了用于A / D转换器的输入级，包括跨导元件，其适于在跨导元件的第一输入处接收将由A / D转换器转换为数字信号的模拟输入信号， 用于向所述跨导元件的第二输入提供模拟反馈信号的反馈路径，所述模拟反馈信号基于所述A / D转换器的数字输出信号，以及积分器，用于对所述跨导元件的输出电流进行积分，其中 积分元件适于产生表示积分输出电流的积分器输出信号。 还描述了包括这种输入级的A / D转换器和包括多个这样的A / D转换器的系统。
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公开(公告)号：US20150115933A1
公开(公告)日：2015-04-30
申请号：US14475082
申请日：2014-09-02
Applicant: NXP B.V.
CPC classification number: G01R33/0029 , G01D5/2448 , G01D5/2451 , G01P3/488 , G01R19/2506 , G01R19/2509 , G01R23/02
Abstract: There is described a device for removing an offset from a signal, the device comprising (a) a frequency estimation unit (260) for estimating a frequency of the signal, (b) an offset estimation unit (222) for estimating the offset in the signal by applying an adaptive low pass filter to the signal, wherein a cut-off frequency of the adaptive low pass filter is determined based on the frequency of the signal estimated by the frequency estimation unit (260), and (c) a subtraction unit (230) adapted to subtract the offset estimated by the offset estimation unit (222) from the signal. There is also described a filter unit comprising the device. Furthermore, there is described a corresponding method of removing an offset from a signal as well as a computer program and a computer program product for performing the method by means of a computer.
Abstract translation: 描述了用于从信号中去除偏移的装置，该装置包括（a）用于估计信号频率的频率估计单元（260），（b）用于估计信号中的偏移的偏移估计单元（222） 信号通过对信号应用自适应低通滤波器，其中基于由频率估计单元（260）估计的信号的频率来确定自适应低通滤波器的截止频率，以及（c）减法单元 （230），适于从所述信号中减去由所述偏移估计单元（222）估计的偏移。 还描述了包括该装置的过滤单元。 此外，描述了从信号中去除偏移的相应方法以及用于通过计算机执行该方法的计算机程序和计算机程序产品。
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Patent Agency Ranking
公开(公告)号：US09817082B2
公开(公告)日：2017-11-14
申请号：US13899915
申请日：2013-05-22
Applicant: NXP B.V.
CPC classification number: G01R33/06 , G01B7/023 , G01D5/145 , G01R33/0029
Abstract: A magnetic sensor arrangement for determining information indicative of characteristics of a mechanical component has a first magnetic sensor to sense a signal associated with a periodic changing magnetic field generated by relative movement of the mechanical component and the magnetic sensor arrangement, a second magnetic sensor to sense that signal, wherein the first sensor is arranged a fixed distance from the second sensor, and a determination unit coupled to the first and second sensors to receive output signals of the first and second sensors. The output signal of the first sensor is phase-shifted to the output signal of the second sensor, to compare the output signals for determining the absolute phase of the signal associated with the periodic changing magnetic field, and to determine information indicative of characteristics of the mechanical component based on the determined absolute phase of the signal associated with the periodic changing magnetic field.
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公开(公告)号：US09658295B2
公开(公告)日：2017-05-23
申请号：US14475082
申请日：2014-09-02
Applicant: NXP B.V.
CPC classification number: G01R33/0029 , G01D5/2448 , G01D5/2451 , G01P3/488 , G01R19/2506 , G01R19/2509 , G01R23/02
Abstract: There is described a device for removing an offset from a signal, the device comprising (a) a frequency estimation unit (260) for estimating a frequency of the signal, (b) an offset estimation unit (222) for estimating the offset in the signal by applying an adaptive low pass filter to the signal, wherein a cut-off frequency of the adaptive low pass filter is determined based on the frequency of the signal estimated by the frequency estimation unit (260), and (c) a subtraction unit (230) adapted to subtract the offset estimated by the offset estimation unit (222) from the signal. There is also described a filter unit comprising the device. Furthermore, there is described a corresponding method of removing an offset from a signal as well as a computer program and a computer program product for performing the method by means of a computer.
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公开(公告)号：US09614519B2
公开(公告)日：2017-04-04
申请号：US14729341
申请日：2015-06-03
Applicant: NXP B.V.
Inventor： Fabio Sebastiano
CPC classification number: H03K17/56 , G11C27/026 , H03F3/005 , H03F2200/261
Abstract: There is described a driver for a switched capacitor circuit (230, 330), the driver comprising (a) a voltage amplifier (210, 310) comprising a signal input (212, 312), a feedback input (214, 314) and an amplifier output (216, 316), and (b) a feedback network (220) coupled between the amplifier output (216, 316) and the feedback input (214, 314). The feedback network comprises a track-and-hold circuit (222) adapted to mask a voltage dip occurring at the amplifier output (216, 316) at the beginning of a switched capacitor circuit charging phase. There is also described a switched capacitor circuit comprising such a driver, a sensor device, and a method of driving a switched capacitor circuit.
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公开(公告)号：US09325340B2
公开(公告)日：2016-04-26
申请号：US14475180
申请日：2014-09-02
Applicant: NXP B.V.
Inventor： Burak Gonen , Fabio Sebastiano , Kofi Afolabi Anthony Makinwa , Robert Hendrikus Margaretha van Veldhoven
Abstract: An efficient analog to digital converter is disclosed. The efficient analog to digital converter includes a coarse analog to digital converter coupled to an input analog signal. The coarse analog to digital converter is configured to provide an approximate digital representation of the input analog signal. The efficient analog to digital converter also includes a fine analog to digital converter coupled to the input analog signal. The output of the coarse analog to digital converter is coupled to the fine analog to digital converter. The fine analog to digital converter is configured to set input range of the fine analog to digital converter as a function of the output of the coarse analog to digital converter.
Abstract translation: 公开了一种高效的模数转换器。 有效的模数转换器包括耦合到输入模拟信号的粗模数转换器。 粗略模数转换器被配置为提供输入模拟信号的近似数字表示。 高效的模数转换器还包括耦合到输入模拟信号的精细模数转换器。 粗略模数转换器的输出端连接到精细模数转换器。 精细模数转换器被配置为根据粗略模数转换器的输出设置精细模数转换器的输入范围。
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公开(公告)号：US20160065231A1
公开(公告)日：2016-03-03
申请号：US14475180
申请日：2014-09-02
Applicant: NXP B.V.
Inventor： Burak Gonen , Fabio Sebastiano , Kofi Afolabi Anthony Makinwa , Robert Hendrikus Margaretha van Veldhoven
Abstract: An efficient analog to digital converter is disclosed. The efficient analog to digital converter includes a coarse analog to digital converter coupled to an input analog signal. The coarse analog to digital converter is configured to provide an approximate digital representation of the input analog signal. The efficient analog to digital converter also includes a fine analog to digital converter coupled to the input analog signal. The output of the coarse analog to digital converter is coupled to the fine analog to digital converter. The fine analog to digital converter is configured to set input range of the fine analog to digital converter as a function of the output of the coarse analog to digital converter.
Abstract translation: 公开了一种高效的模数转换器。 有效的模数转换器包括耦合到输入模拟信号的粗模数转换器。 粗略模数转换器被配置为提供输入模拟信号的近似数字表示。 高效的模数转换器还包括耦合到输入模拟信号的精细模数转换器。 粗略模数转换器的输出端连接到精细模数转换器。 精细模数转换器被配置为根据粗略模数转换器的输出设置精细模数转换器的输入范围。
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