公开(公告)号：US20210363632A1

公开(公告)日：2021-11-25

申请号：US16497076

申请日：2018-03-19

申请人： NexWafe GmbH

发明人： Stefan Reber ,  Kai Schillinger ,  Benjamin Reichhart

IPC分类号： C23C16/44 ,  C23C16/458 ,  C23C16/24 ,  C23C16/54

摘要： A process chamber guide, designed for linearly guiding a substrate carrier that can be displaced in the process chamber guide in a direction of guidance such that by displacement of the substrate carrier in a process position, an at least regional demarcation of a process chamber guide can be formed by the process chamber guide and substrate carrier. The invention is characterized in that the process chamber guide has a roller bearing for the substrate support and at least one sealing surface, which extends parallel to the direction of guidance and is designed and arranged in such a way that, whenever the substrate carrier arranged in the process chamber guide is in a process position, the sealing surface is spaced apart less than 1 mm from the substrate carrier. The invention further relates to a process chamber and to a method for guiding a substrate carrier in a processing position.

公开(公告)号：US10985005B2

公开(公告)日：2021-04-20

申请号：US16095499

申请日：2017-04-11

申请人： NexWafe GmbH

发明人： Stefan Reber ,  Kai Schillinger ,  Frank Siebke

IPC分类号： H01L21/00 ,  H01L21/02 ,  H01L31/18

摘要： A method for producing a silicon wafer for an electronic component, having the method step of epitaxially growing of a silicon layer on a carrier substrate and removing the silicon layer as a silicon wafer from the carrier substrate, in which at least one p-dopant and at least one n-dopant are introduced into the silicon layer during the epitaxial growth. The dopants are introduced into the silicon layer such that the silicon layer is formed having an electrically active p-doping and an electrically active n-doping, each greater than 1×1014 cm−3.

公开(公告)号：US11862462B2

公开(公告)日：2024-01-02

申请号：US16754860

申请日：2018-10-25

申请人： NexWafe GmbH

发明人： Stefan Reber ,  Kai Schillinger

IPC分类号： H01L21/02 ,  C23C16/24 ,  C23C16/455 ,  C23C16/52 ,  H01L21/67

CPC分类号： H01L21/0262 ,  C23C16/24 ,  C23C16/45593 ,  C23C16/52 ,  H01L21/02532 ,  H01L21/67017

摘要： A method for the continuous vapour deposition of silicon on substrates, including the following steps: a) introducing at least one substrate into a reaction chamber; b) introducing a process gas and at least one gaseous silicon precursor compound into the reaction chamber; c) forming a gaseous mixture of at least one silicon-based intermediate product coexisting with the gaseous silicon precursor compound and the process gas; d) forming a silicon layer by vapour deposition of silicon from the gaseous silicon precursor compound and/or the silicon-based intermediate product on the substrate; e) discharging an excess of the gaseous mixture from the reaction chamber; f) returning at least one of the constituents of the excess of the gaseous mixture, selected from the silicon precursor compound, the silicon-based intermediate product and/or the process gas into the reaction chamber, wherein introducing the gaseous silicon precursor compound into the reaction chamber is regulated such that the molar ratio of the silicon-based intermediate product to the silicon precursor compound has a value of 0.2:0.8 to 0.5:0.5.

公开(公告)号：US10943826B2

公开(公告)日：2021-03-09

申请号：US16335911

申请日：2017-08-24

申请人： NexWafe GmbH

发明人： Stefan Reber ,  Kai Schillinger

IPC分类号： H01L21/78 ,  H01L21/02 ,  H01L31/18 ,  C25F3/12

摘要： A method for arranging a plurality of semiconductor seed substrates on a carrier element, in which for applying a semiconductor layer to the seed substrates, the seed substrates are arranged on the carrier element by integral bonding. A carrier element having integrally bonded seed substrates for coating with a semiconductor layer is also provided.

公开(公告)号：US10508365B2

公开(公告)日：2019-12-17

申请号：US15769912

申请日：2016-09-27

申请人： NexWafe GmbH

发明人： Stefan Reber ,  Kai Schillinger ,  Frank Siebke

IPC分类号： H01L21/02 ,  H01L21/683 ,  C30B33/02 ,  C30B33/06 ,  C30B25/18 ,  C30B29/06

摘要： A method for producing a semiconductor layer (3), including the following method steps: A creating a release layer (2) on a carrier substrate (1); B applying a semiconductor layer (3) to the release layer (2); C detaching the semiconductor layer (3) from the carrier substrate. The invention is characterized in that, in method step A, the release layer (2) is created so as to fully cover at least a processing side of the carrier substrate, in that, in method step B, the semiconductor layer (3) is applied so as to fully cover the release layer (2) at least on the processing side and partially overlap one or more peripheral sides (5a, 5b) of the carrier substrate and in that, between method steps B and C, in a method step C0, regions of the semiconductor layer (3) that overlap a peripheral side are removed. The invention also relates to a semiconductor wafer, to a device for edge correction, to a detaching unit and to a device for producing a semiconductor layer.

公开(公告)号：US11519094B2

公开(公告)日：2022-12-06

申请号：US17049729

申请日：2019-05-06

申请人： NexWafe GmbH

发明人： Stefan Reber ,  Kai Schillinger ,  Benjamin Reichhart ,  Nena Milenkovic

IPC分类号： C25F7/00 ,  H01L21/683 ,  H01L21/3063 ,  C25D17/00 ,  H01L21/67

摘要： An apparatus for etching one side of a semiconductor layer of a workpiece, including at least one etching basin for receiving an electrolyte, a first electrode which is provided for electrically contacting the electrolyte located in the etching basin, a second electrode which is provided for electrically contacting the semiconductor layer, a electrical power source which is electrically conductively connected to the first and the second electrodes for generating an etching current, and a transport apparatus for transporting the workpiece relative to the etching basin such that a semiconductor layer etching face to be etched can be wetted by the electrolyte in the etching basin. The transport apparatus has a negative pressure holding element for the workpiece, designed to position the workpiece on a retaining face of the workpiece opposite to the etching face by negative pressure, and the second electrode is positioned on the negative pressure holding element such that, when the workpiece is positioned on the negative pressure holding element, the retaining face of the workpiece is contacted by the second electrode. A method for etching one side of a semiconductor layer of a workpiece is also provided.

公开(公告)号：US11915922B2

公开(公告)日：2024-02-27

申请号：US17205720

申请日：2021-03-18

申请人： NexWafe GmbH

发明人： Stefan Reber ,  Kai Schillinger ,  Frank Siebke

IPC分类号： H01L21/00 ,  H01L21/02 ,  H01L31/028 ,  H01L31/18

CPC分类号： H01L21/02005 ,  H01L21/0262 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02579 ,  H01L31/028 ,  H01L31/1804

摘要： A silicon wafer for an electronic component, having an epitaxially grown silicon layer on a carrier substrate and the silicon layer is removed as a silicon wafer from the carrier substrate, in which at least one p-dopant and at least one n-dopant are introduced into the silicon layer during the epitaxial growth. The dopants are introduced into the silicon layer such that the silicon layer is formed having an electrically active p-doping and an electrically active n-doping, each greater than 1×1014 cm−3.

公开(公告)号：US10975490B2

公开(公告)日：2021-04-13

申请号：US16061145

申请日：2016-12-08

申请人： NexWafe GmbH

发明人： Stefan Reber ,  Kai Schillinger

IPC分类号： C25F3/12 ,  C25F7/00 ,  H01M4/134 ,  H01M4/1395 ,  H01L21/677 ,  H01L21/306 ,  H01L21/67 ,  C23C16/02 ,  C23C16/44 ,  C23C16/458 ,  C23C16/54 ,  C25D7/12

摘要： An apparatus for etching one side of a semiconductor layer, including at least one etching tank for receiving an electrolyte, a first electrode, which is arranged to make electrical contact with the electrolyte located in the etching tank during use, at least a second electrode, which is arranged to make indirect or direct electrical contact with the semiconductor layer, at least one electric current source, which is electrically conductively connected to the first and the second electrode to produce an etching current, and at least one transport apparatus for transporting the semiconductor layer relative to the etching tank in such a way that substantially only an etching side of the semiconductor layer that is to be etched can be wetted by the electrolyte located in the etching tank during use. The current source is formed as a variable current source, and that the apparatus has a controller for controlling the variable current source, wherein the apparatus is designed such that the etching current can be changed automatically by the controller during the etching operation. A method for etching one side of a semiconductor layer is also provided.

公开(公告)号：US20190214302A1

公开(公告)日：2019-07-11

申请号：US16335911

申请日：2017-08-24

申请人： NexWafe GmbH

发明人： Stefan Reber ,  Kai Schillinger

IPC分类号： H01L21/78 ,  C23C16/458 ,  H01L21/02 ,  C25F3/12

CPC分类号： H01L21/7806 ,  C23C16/4587 ,  C25F3/12 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/02576 ,  H01L21/02658 ,  H01L31/1892 ,  Y02E10/50

摘要： A method for arranging a plurality of semiconductor seed substrates on a carrier element, in which for applying a semiconductor layer to the seed substrates, the seed substrates are arranged on the carrier element by integral bonding. A carrier element having integrally bonded seed substrates for coating with a semiconductor layer is also provided.

公开(公告)号：US20190131121A1

公开(公告)日：2019-05-02

申请号：US16095499

申请日：2017-04-11

申请人： NexWafe GmbH

发明人： Stefan Reber ,  Kai Schillinger ,  Frank Siebke

IPC分类号： H01L21/02 ,  H01L31/18

摘要： A method for producing a silicon wafer for an electronic component, having the method step of epitaxially growing of a silicon layer on a carrier substrate and removing the silicon layer as a silicon wafer from the carrier substrate, in which at least one p-dopant and at least one n-dopant are introduced into the silicon layer during the epitaxial growth. The dopants are introduced into the silicon layer such that the silicon layer is formed having an electrically active p-doping and an electrically active n-doping, each greater than 1×1014 cm−3.