公开(公告)号：US09123705B2

公开(公告)日：2015-09-01

申请号：US14552212

申请日：2014-11-24

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Richard A. Blanchard ,  William J. Ray ,  Mark D. Lowenthal ,  Xiaorong Cai ,  Theodore Kamins

IPC: H01L23/00 ,  H01L23/48 ,  H01L21/768 ,  H01L21/288 ,  H01L25/065 ,  H01L25/00 ,  H01L23/498 ,  H01L21/48 ,  H01L23/522 ,  H01L23/532

CPC classification number: H01L23/481 ,  H01L21/288 ,  H01L21/486 ,  H01L21/76879 ,  H01L21/76882 ,  H01L21/76898 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/5328 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/19 ,  H01L24/80 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03002 ,  H01L2224/0332 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/08146 ,  H01L2224/08165 ,  H01L2224/73265 ,  H01L2224/76155 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/12042 ,  H01L2224/03 ,  H01L2224/80 ,  H01L2924/00

Abstract: Vias (holes) are formed in a wafer or a dielectric layer. A low viscosity conductive ink, containing microscopic metal particles, is deposited over the top surface of the wafer to cover the vias. An external force is applied to urge the ink into the vias, including an electrical force, a magnetic force, a centrifugal force, a vacuum, or a suction force for outgassing the air in the vias. Any remaining ink on the surface is removed by a squeegee, spinning, an air knife, or removal of an underlying photoresist layer. The ink in the vias is heated to evaporate the liquid and sinter the remaining metal particles to form a conductive path in the vias. The resulting wafer may be bonded to one or more other wafers and singulated to form a 3-D module.

公开(公告)号：US20150076711A1

公开(公告)日：2015-03-19

申请号：US14552212

申请日：2014-11-24

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Richard A. Blanchard ,  William J. Ray ,  Mark D. Lowenthal ,  Xiaorong Cai ,  Theodore Kamins

IPC: H01L23/48

CPC classification number: H01L23/481 ,  H01L21/288 ,  H01L21/486 ,  H01L21/76879 ,  H01L21/76882 ,  H01L21/76898 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/5328 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/19 ,  H01L24/80 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03002 ,  H01L2224/0332 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/08146 ,  H01L2224/08165 ,  H01L2224/73265 ,  H01L2224/76155 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/12042 ,  H01L2224/03 ,  H01L2224/80 ,  H01L2924/00

Abstract: Vias (holes) are formed in a wafer or a dielectric layer. A low viscosity conductive ink, containing microscopic metal particles, is deposited over the top surface of the wafer to cover the vias. An external force is applied to urge the ink into the vias, including an electrical force, a magnetic force, a centrifugal force, a vacuum, or a suction force for outgas sing the air in the vias. Any remaining ink on the surface is removed by a squeegee, spinning, an air knife, or removal of an underlying photoresist layer. The ink in the vias is heated to evaporate the liquid and sinter the remaining metal particles to form a conductive path in the vias. The resulting wafer may be bonded to one or more other wafers and singulated to form a 3-D module.

Abstract translation: 通孔（孔）形成在晶片或电介质层中。 包含微观金属颗粒的低粘度导电油墨沉积在晶片的顶表面上以覆盖通孔。 施加外力以将油墨推入通孔中，包括电力，磁力，离心力，真空或用于排气通过通孔中的空气的吸力。 表面上的任何剩余的油墨都被刮刀，纺丝，气刀或下面的光致抗蚀剂层除去。 将通孔中的油墨加热以蒸发液体并烧结剩余的金属颗粒，以在通孔中形成导电路径。 所得到的晶片可以结合到一个或多个其它晶片并且被单个化以形成3-D模块。

公开(公告)号：US08940627B2

公开(公告)日：2015-01-27

申请号：US14075089

申请日：2013-11-08

Applicant: Nthdegree Technologies Worldwide Inc.

Inventor： Richard A. Blanchard ,  William J. Ray ,  Mark D. Lowenthal ,  Xiaorong Cai ,  Theodore Kamins

IPC: H01L21/44 ,  H01L21/4763 ,  H01L21/768 ,  H01L21/288 ,  H01L23/48 ,  H01L23/00

CPC classification number: H01L23/481 ,  H01L21/288 ,  H01L21/486 ,  H01L21/76879 ,  H01L21/76882 ,  H01L21/76898 ,  H01L23/49827 ,  H01L23/5226 ,  H01L23/5328 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/19 ,  H01L24/80 ,  H01L24/94 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03002 ,  H01L2224/0332 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/08146 ,  H01L2224/08165 ,  H01L2224/73265 ,  H01L2224/76155 ,  H01L2224/83191 ,  H01L2224/94 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06572 ,  H01L2924/12042 ,  H01L2224/03 ,  H01L2224/80 ,  H01L2924/00

Abstract: Vias (holes) are formed in a wafer or a dielectric layer. A low viscosity conductive ink, containing microscopic metal particles, is deposited over the top surface of the wafer to cover the vias. An external force is applied to urge the ink into the vias, including an electrical force, a magnetic force, a centrifugal force, a vacuum, or a suction force for outgassing the air in the vias. Any remaining ink on the surface is removed by a squeegee, spinning, an air knife, or removal of an underlying photoresist layer. The ink in the vias is heated to evaporate the liquid and sinter the remaining metal particles to form a conductive path in the vias. The resulting wafer may be bonded to one or more other wafers and singulated to form a 3-D module.

Abstract translation: 通孔（孔）形成在晶片或电介质层中。 包含微观金属颗粒的低粘度导电油墨沉积在晶片的顶表面上以覆盖通孔。 施加外力以将油墨推入通孔中，包括用于使过孔中的空气排气的电力，磁力，离心力，真空或吸力。 表面上的任何剩余的油墨都被刮刀，纺丝，气刀或下面的光致抗蚀剂层除去。 将通孔中的油墨加热以蒸发液体并烧结剩余的金属颗粒，以在通孔中形成导电路径。 所得到的晶片可以结合到一个或多个其它晶片并且被单个化以形成3-D模块。