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公开(公告)号:USRE49987E1
公开(公告)日:2024-05-28
申请号:US17725442
申请日:2022-04-20
Applicant: Invensas LLC
Inventor: Cyprian Emeka Uzoh , Rajesh Katkar
IPC: H01L25/065 , B81B7/00 , B81C1/00 , H01L21/48 , H01L23/00 , H01L23/367 , H01L23/42 , H01L23/48 , H01L23/498 , H01L23/522 , H01L23/538 , H01L25/00 , H01L25/16 , H01L49/02
CPC classification number: H01L25/0657 , B81B7/0074 , B81C1/0023 , H01L21/4853 , H01L23/3675 , H01L23/42 , H01L23/481 , H01L23/49811 , H01L23/522 , H01L23/5383 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/24 , H01L24/49 , H01L24/73 , H01L24/94 , H01L24/97 , H01L25/0652 , H01L25/16 , H01L25/50 , H01L28/10 , H01L28/20 , H01L28/40 , H01L24/02 , H01L24/17 , H01L24/32 , H01L24/33 , H01L24/45 , H01L24/48 , H01L24/81 , H01L2224/0239 , H01L2224/0332 , H01L2224/0333 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/0347 , H01L2224/03614 , H01L2224/0391 , H01L2224/03912 , H01L2224/03914 , H01L2224/0401 , H01L2224/04042 , H01L2224/05111 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05169 , H01L2224/05184 , H01L2224/05547 , H01L2224/05565 , H01L2224/05568 , H01L2224/05569 , H01L2224/05611 , H01L2224/05616 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/05684 , H01L2224/1134 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11903 , H01L2224/1191 , H01L2224/13022 , H01L2224/13023 , H01L2224/13025 , H01L2224/13082 , H01L2224/131 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/13184 , H01L2224/13565 , H01L2224/13616 , H01L2224/1403 , H01L2224/14131 , H01L2224/14132 , H01L2224/14134 , H01L2224/16145 , H01L2224/16146 , H01L2224/16148 , H01L2224/16225 , H01L2224/16227 , H01L2224/16265 , H01L2224/17181 , H01L2224/24147 , H01L2224/24227 , H01L2224/244 , H01L2224/32145 , H01L2224/3303 , H01L2224/33181 , H01L2224/45015 , H01L2224/45147 , H01L2224/48091 , H01L2224/48149 , H01L2224/4903 , H01L2224/73201 , H01L2224/73253 , H01L2224/73265 , H01L2224/81192 , H01L2224/81193 , H01L2224/81825 , H01L2224/94 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06562 , H01L2225/06568 , H01L2924/00014 , H01L2924/01074 , H01L2924/01082 , H01L2924/01322 , H01L2924/12042 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/1461 , H01L2924/15192 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/16251 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/20758 , H01L2924/20759 , H01L2924/2076 , H01L2924/3841 , H01L2924/01322 , H01L2924/00 , H01L2924/15787 , H01L2924/00 , H01L2924/15788 , H01L2924/00 , H01L2924/181 , H01L2924/00 , H01L2924/12042 , H01L2924/00 , H01L2224/0239 , H01L2924/01029 , H01L2224/131 , H01L2924/014 , H01L2224/05568 , H01L2924/00014 , H01L2224/13147 , H01L2924/00014 , H01L2224/81825 , H01L2924/00014 , H01L2224/1147 , H01L2924/00014 , H01L2224/0347 , H01L2924/00014 , H01L2224/05147 , H01L2924/00014 , H01L2224/05647 , H01L2924/00014 , H01L2224/05124 , H01L2924/00014 , H01L2224/05624 , H01L2924/00014 , H01L2224/05111 , H01L2924/00014 , H01L2224/05611 , H01L2924/00014 , H01L2224/05169 , H01L2924/00014 , H01L2224/05669 , H01L2924/00014 , H01L2224/05155 , H01L2924/00014 , H01L2224/05655 , H01L2924/00014 , H01L2224/05144 , H01L2924/00014 , H01L2224/05644 , H01L2924/00014 , H01L2224/05184 , H01L2924/00014 , H01L2224/05684 , H01L2924/00014 , H01L2224/05139 , H01L2924/00014 , H01L2224/05639 , H01L2924/00014 , H01L2224/0345 , H01L2924/00014 , H01L2224/03452 , H01L2924/00014 , H01L2224/0332 , H01L2924/00014 , H01L2224/03462 , H01L2924/00014 , H01L2224/03464 , H01L2924/00014 , H01L2224/11462 , H01L2924/00014 , H01L2224/11464 , H01L2924/00014 , H01L2224/0333 , H01L2924/00012 , H01L2224/13616 , H01L2924/00014 , H01L2224/05616 , H01L2924/00014 , H01L2224/13155 , H01L2924/01074 , H01L2224/13184 , H01L2924/01028 , H01L2224/13124 , H01L2924/00014 , H01L2224/13111 , H01L2924/01082 , H01L2224/13155 , H01L2924/00014 , H01L2224/13144 , H01L2924/00014 , H01L2224/13139 , H01L2924/00014 , H01L2224/13116 , H01L2924/00014 , H01L2224/13113 , H01L2924/00014 , H01L2224/13169 , H01L2924/00014 , H01L2224/73201 , H01L2224/05 , H01L2224/13 , H01L2224/94 , H01L2224/81 , H01L2224/48091 , H01L2924/00014 , H01L2224/45147 , H01L2924/00 , H01L2224/97 , H01L2224/81 , H01L2224/45147 , H01L2924/00014 , H01L2224/45015 , H01L2924/20751 , H01L2224/45015 , H01L2924/20752 , H01L2224/45015 , H01L2924/20753 , H01L2224/45015 , H01L2924/20754 , H01L2224/45015 , H01L2924/20755 , H01L2224/45015 , H01L2924/20756 , H01L2224/45015 , H01L2924/20757 , H01L2224/45015 , H01L2924/20758 , H01L2224/45015 , H01L2924/20759 , H01L2224/45015 , H01L2924/2076 , H01L2924/00014 , H01L2224/45015 , H01L2924/20751 , H01L2924/00014 , H01L2224/45015 , H01L2924/20752 , H01L2924/00014 , H01L2224/45015 , H01L2924/20753 , H01L2924/00014 , H01L2224/45015 , H01L2924/20754 , H01L2924/00014 , H01L2224/45015 , H01L2924/20755 , H01L2924/00014 , H01L2224/45015 , H01L2924/20756 , H01L2924/00014 , H01L2224/45015 , H01L2924/20757 , H01L2924/00014 , H01L2224/45015 , H01L2924/20758 , H01L2924/00014 , H01L2224/45015 , H01L2924/20759 , H01L2924/00014 , H01L2224/45015 , H01L2924/2076 , H01L2924/00014 , H01L2224/45099
Abstract: Apparatus(es) and method(s) relate generally to via arrays on a substrate. In one such apparatus, the substrate has a conductive layer. First plated conductors are in a first region extending from a surface of the conductive layer. Second plated conductors are in a second region extending from the surface of the conductive layer. The first plated conductors and the second plated conductors are external to the first substrate. The first region is disposed at least partially within the second region. The first plated conductors are of a first height. The second plated conductors are of a second height greater than the first height. A second substrate is coupled to first ends of the first plated conductors. The second substrate has at least one electronic component coupled thereto. A die is coupled to second ends of the second plated conductors. The die is located over the at least one electronic component.
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公开(公告)号:US20180019191A1
公开(公告)日:2018-01-18
申请号:US15715515
申请日:2017-09-26
Applicant: INVENSAS CORPORATION
Inventor: Cyprian Emeka UZOH , Rajesh Katkar
IPC: H01L23/498 , B23K1/00 , H01L25/065 , H01L23/00 , H01L23/31 , H01L21/48 , B32B15/01 , B23K35/22 , B23K35/02 , H01L25/10 , H01L25/00 , H01L21/56 , B23K101/40
CPC classification number: H01L23/49811 , B23K1/0016 , B23K35/0244 , B23K35/0266 , B23K35/22 , B23K2101/40 , B32B15/01 , H01L21/4853 , H01L21/56 , H01L21/563 , H01L21/565 , H01L23/3114 , H01L23/3135 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/19 , H01L24/20 , H01L24/24 , H01L24/73 , H01L24/742 , H01L24/81 , H01L24/82 , H01L24/83 , H01L24/98 , H01L25/0652 , H01L25/0657 , H01L25/105 , H01L25/50 , H01L2224/03 , H01L2224/03001 , H01L2224/03009 , H01L2224/03318 , H01L2224/0332 , H01L2224/0333 , H01L2224/03334 , H01L2224/0348 , H01L2224/03848 , H01L2224/03849 , H01L2224/039 , H01L2224/03901 , H01L2224/0391 , H01L2224/04105 , H01L2224/05022 , H01L2224/051 , H01L2224/05294 , H01L2224/05547 , H01L2224/05567 , H01L2224/05573 , H01L2224/05582 , H01L2224/056 , H01L2224/05794 , H01L2224/05839 , H01L2224/05844 , H01L2224/05847 , H01L2224/05855 , H01L2224/0603 , H01L2224/06102 , H01L2224/10145 , H01L2224/11001 , H01L2224/11005 , H01L2224/11009 , H01L2224/111 , H01L2224/11318 , H01L2224/1132 , H01L2224/11334 , H01L2224/1134 , H01L2224/11848 , H01L2224/11849 , H01L2224/119 , H01L2224/11901 , H01L2224/1191 , H01L2224/13005 , H01L2224/13017 , H01L2224/13018 , H01L2224/13021 , H01L2224/13022 , H01L2224/13082 , H01L2224/131 , H01L2224/13116 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/1319 , H01L2224/13294 , H01L2224/133 , H01L2224/13339 , H01L2224/13344 , H01L2224/13347 , H01L2224/13355 , H01L2224/13561 , H01L2224/13562 , H01L2224/13565 , H01L2224/136 , H01L2224/13609 , H01L2224/13611 , H01L2224/1403 , H01L2224/16058 , H01L2224/16059 , H01L2224/16145 , H01L2224/16147 , H01L2224/16148 , H01L2224/16227 , H01L2224/16238 , H01L2224/1701 , H01L2224/1703 , H01L2224/17181 , H01L2224/17505 , H01L2224/2101 , H01L2224/211 , H01L2224/2401 , H01L2224/2402 , H01L2224/24137 , H01L2224/24146 , H01L2224/2919 , H01L2224/32145 , H01L2224/73104 , H01L2224/73204 , H01L2224/73267 , H01L2224/75253 , H01L2224/81 , H01L2224/81138 , H01L2224/81141 , H01L2224/81193 , H01L2224/81203 , H01L2224/8121 , H01L2224/8122 , H01L2224/81224 , H01L2224/81815 , H01L2224/82005 , H01L2224/82101 , H01L2224/82102 , H01L2224/82105 , H01L2224/83 , H01L2224/8385 , H01L2224/9211 , H01L2225/06513 , H01L2225/1023 , H01L2225/1058 , H01L2924/00 , H01L2924/00012 , H01L2924/00014 , H01L2924/014 , H01L2924/07025 , H01L2924/15192 , H01L2924/15311 , H01L2924/15321 , H01L2924/3512 , H01L2924/381 , H01L2924/3841
Abstract: A solder connection may be surrounded by a solder locking layer (1210, 2210) and may be recessed in a hole (1230) in that layer. The recess may be obtained by evaporating a vaporizable portion (1250) of the solder connection. Other features are also provided.
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公开(公告)号:US09761444B2
公开(公告)日:2017-09-12
申请号:US15084091
申请日:2016-03-29
Inventor: Ralph G. Nuzzo , John A. Rogers , Etienne Menard , Keon Jae Lee , Dahl-Young Khang , Yugang Sun , Matthew Meitl , Zhengtao Zhu
IPC: H01L21/02 , B82Y10/00 , H01L29/06 , H01L29/786 , H01L31/0392 , H01L31/18 , H01L21/308 , H01L29/12 , H01L29/04 , H01L23/00 , H01L21/683 , H01L27/12 , H01L25/075 , H01L33/00 , H01L33/32
CPC classification number: H01L29/76 , B81C2201/0185 , B82Y10/00 , H01L21/02521 , H01L21/02603 , H01L21/02628 , H01L21/308 , H01L21/322 , H01L21/6835 , H01L23/02 , H01L24/03 , H01L24/05 , H01L24/08 , H01L24/29 , H01L24/32 , H01L24/80 , H01L24/83 , H01L24/94 , H01L24/97 , H01L25/0753 , H01L27/1285 , H01L27/1292 , H01L29/04 , H01L29/06 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/068 , H01L29/12 , H01L29/78603 , H01L29/78681 , H01L29/78696 , H01L31/0392 , H01L31/03926 , H01L31/1804 , H01L31/1864 , H01L31/1896 , H01L33/007 , H01L33/0079 , H01L33/32 , H01L2221/68368 , H01L2221/68381 , H01L2224/03 , H01L2224/0332 , H01L2224/0345 , H01L2224/03614 , H01L2224/0362 , H01L2224/05073 , H01L2224/05082 , H01L2224/05124 , H01L2224/05144 , H01L2224/05155 , H01L2224/05166 , H01L2224/05552 , H01L2224/05553 , H01L2224/05554 , H01L2224/05555 , H01L2224/05644 , H01L2224/05666 , H01L2224/08225 , H01L2224/2919 , H01L2224/32225 , H01L2224/80 , H01L2224/80006 , H01L2224/80121 , H01L2224/80862 , H01L2224/80895 , H01L2224/83 , H01L2224/83005 , H01L2224/83121 , H01L2224/83192 , H01L2224/83193 , H01L2224/8385 , H01L2224/83862 , H01L2224/9202 , H01L2224/94 , H01L2224/95 , H01L2224/97 , H01L2924/00012 , H01L2924/01032 , H01L2924/0665 , H01L2924/10253 , H01L2924/10329 , H01L2924/12032 , H01L2924/12036 , H01L2924/12041 , H01L2924/12042 , H01L2924/12043 , H01L2924/12044 , H01L2924/1305 , H01L2924/1306 , H01L2924/13063 , H01L2924/13091 , H01L2924/14 , H01L2924/1461 , H01L2924/15159 , H01L2924/15162 , H01L2924/15788 , H01L2924/1579 , Y02E10/547 , Y02P70/521 , Y10S977/707 , Y10S977/724 , H01L2924/00014 , H01L2924/00
Abstract: The invention provides methods and devices for fabricating printable semiconductor elements and assembling printable semiconductor elements onto substrate surfaces. Methods, devices and device components of the present invention are capable of generating a wide range of flexible electronic and optoelectronic devices and arrays of devices on substrates comprising polymeric materials. The present invention also provides stretchable semiconductor structures and stretchable electronic devices capable of good performance in stretched configurations.
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4.
公开(公告)号:US09673096B2
公开(公告)日:2017-06-06
申请号:US14541239
申请日:2014-11-14
Applicant: INFINEON TECHNOLOGIES AG
Inventor: Joachim Hirschler , Michael Roesner , Markus Juch Heinrici , Gudrun Stranzl , Martin Mischitz , Martin Zgaga
IPC: H01L21/78 , H01L21/288 , H01L21/3213 , H01L21/683 , H01L23/00
CPC classification number: H01L21/78 , H01L21/288 , H01L21/3213 , H01L21/6835 , H01L23/562 , H01L24/03 , H01L24/05 , H01L24/06 , H01L24/94 , H01L24/95 , H01L2221/68327 , H01L2221/68363 , H01L2221/68368 , H01L2224/03002 , H01L2224/03005 , H01L2224/03009 , H01L2224/0332 , H01L2224/0345 , H01L2224/03452 , H01L2224/03464 , H01L2224/03505 , H01L2224/03848 , H01L2224/039 , H01L2224/05794 , H01L2224/05847 , H01L2224/06181 , H01L2224/94 , H01L2224/95 , H01L2924/00014 , H01L2924/00012 , H01L2224/03 , H01L2221/68381
Abstract: According to various embodiments, a method for processing a semiconductor substrate may include: covering a plurality of die regions of the semiconductor substrate with a metal; forming a plurality of dies from the semiconductor substrate, wherein each die of the plurality of dies is covered with the metal; and, subsequently, annealing the metal covering at least one die of the plurality of dies.
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公开(公告)号:US20170110407A1
公开(公告)日:2017-04-20
申请号:US14885757
申请日:2015-10-16
Applicant: Xilinx, Inc.
Inventor: Raghunandan Chaware , Amitava Majumdar , Glenn O'Rourke , Inderjit Singh
IPC: H01L23/538 , H01L25/065 , H01L23/00 , H01L25/18
CPC classification number: H01L23/5385 , H01L21/561 , H01L21/568 , H01L21/6835 , H01L22/14 , H01L23/3114 , H01L23/538 , H01L23/5381 , H01L23/5384 , H01L23/5386 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L24/92 , H01L24/94 , H01L24/96 , H01L25/0652 , H01L25/0655 , H01L25/18 , H01L2221/68327 , H01L2221/68331 , H01L2221/68372 , H01L2224/03312 , H01L2224/0332 , H01L2224/0345 , H01L2224/03462 , H01L2224/12105 , H01L2224/131 , H01L2224/16145 , H01L2224/16227 , H01L2224/1703 , H01L2224/17051 , H01L2224/17181 , H01L2224/73204 , H01L2224/81191 , H01L2224/92 , H01L2224/94 , H01L2924/14 , H01L2924/1431 , H01L2924/1434 , H01L2924/1461 , H01L2924/1515 , H01L2924/152 , H01L2924/153 , H01L2924/15311 , H01L2224/03 , H01L2924/014 , H01L2924/00014 , H01L21/78 , H01L2221/68304 , H01L2224/81 , H01L21/56 , H01L21/304 , H01L2224/11 , H01L2221/68381 , H01L22/00 , H01L2224/1181
Abstract: Techniques for providing a semiconductor assembly having an interconnect die for die-to-die interconnection, an IC package, a method for manufacturing, and a method for routing signals in an IC package are described. In one implementation, a semiconductor assembly is provided that includes a first interconnect die coupled to a first integrated circuit (IC) die and a second IC die by inter-die connections. The first interconnect die includes solid state circuitry that provides a signal transmission path between the IC dice.
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6.Electronic devices with semiconductor die coupled to a thermally conductive substrate 有权
Title translation: 具有半导体管芯的电子器件耦合到导热衬底公开(公告)号:US09589860B2
公开(公告)日:2017-03-07
申请号:US14508645
申请日:2014-10-07
Applicant: Lakshminarayan Viswanathan , Jaynal A. Molla
Inventor: Lakshminarayan Viswanathan , Jaynal A. Molla
IPC: H01L23/495 , H01L23/31 , H01L23/36 , H01L23/367 , H01L23/00 , H01L23/482 , H01L21/683 , H01L23/66 , H01L21/56
CPC classification number: H01L23/3114 , H01L21/561 , H01L21/6835 , H01L21/6836 , H01L23/36 , H01L23/3677 , H01L23/4827 , H01L23/49513 , H01L23/49517 , H01L23/66 , H01L24/03 , H01L24/05 , H01L24/27 , H01L24/29 , H01L24/32 , H01L24/48 , H01L24/741 , H01L24/743 , H01L24/83 , H01L24/92 , H01L24/94 , H01L2221/68318 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/03002 , H01L2224/03312 , H01L2224/0332 , H01L2224/03436 , H01L2224/0345 , H01L2224/0346 , H01L2224/03505 , H01L2224/04026 , H01L2224/05009 , H01L2224/05018 , H01L2224/05073 , H01L2224/05082 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05166 , H01L2224/05551 , H01L2224/05558 , H01L2224/05559 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05666 , H01L2224/05794 , H01L2224/05839 , H01L2224/05844 , H01L2224/05847 , H01L2224/05855 , H01L2224/05864 , H01L2224/05887 , H01L2224/0589 , H01L2224/05893 , H01L2224/27002 , H01L2224/2731 , H01L2224/27312 , H01L2224/2732 , H01L2224/27436 , H01L2224/27438 , H01L2224/27505 , H01L2224/29006 , H01L2224/29011 , H01L2224/29012 , H01L2224/29015 , H01L2224/29017 , H01L2224/2908 , H01L2224/29082 , H01L2224/29083 , H01L2224/29084 , H01L2224/291 , H01L2224/29101 , H01L2224/29109 , H01L2224/29111 , H01L2224/29113 , H01L2224/29116 , H01L2224/29117 , H01L2224/29118 , H01L2224/2912 , H01L2224/29124 , H01L2224/29138 , H01L2224/29139 , H01L2224/29144 , H01L2224/29147 , H01L2224/2918 , H01L2224/29184 , H01L2224/2919 , H01L2224/29193 , H01L2224/2929 , H01L2224/29294 , H01L2224/293 , H01L2224/29339 , H01L2224/29344 , H01L2224/29347 , H01L2224/29355 , H01L2224/29364 , H01L2224/29387 , H01L2224/2939 , H01L2224/29393 , H01L2224/29499 , H01L2224/296 , H01L2224/32245 , H01L2224/48247 , H01L2224/73265 , H01L2224/741 , H01L2224/83191 , H01L2224/83193 , H01L2224/83444 , H01L2224/83447 , H01L2224/83455 , H01L2224/8346 , H01L2224/83815 , H01L2224/92 , H01L2224/92247 , H01L2224/94 , H01L2924/00014 , H01L2924/10158 , H01L2924/1016 , H01L2924/10253 , H01L2924/10272 , H01L2924/1033 , H01L2924/1421 , H01L2924/15738 , H01L2924/15747 , H01L2924/1576 , H01L2924/3512 , H01L2224/27 , H01L2224/11 , H01L2924/0665 , H01L2924/014 , H01L2924/01015 , H01L2924/01048 , H01L2924/01014 , H01L2924/01032 , H01L2924/0105 , H01L2924/01047 , H01L2924/01028 , H01L2924/01027 , H01L2924/01026 , H01L2224/03 , H01L2224/05099 , H01L2924/01006 , H01L2924/04642 , H01L2924/0503 , H01L2924/01005 , H01L2924/00012 , H01L2224/45099 , H01L2221/68304 , H01L21/304 , H01L21/78 , H01L2224/83 , H01L2924/0781 , H01L2924/00 , H01L2224/034 , H01L2221/68368 , H01L2224/274
Abstract: An electronic device includes a semiconductor die having a lower surface, a sintered metallic layer underlying the lower surface of the semiconductor die, a thermally conductive flow layer underlying the sintered metallic layer, and a thermally conductive substrate underlying the thermally conductive flow layer.
Abstract translation: 电子器件包括具有下表面的半导体管芯,位于半导体管芯的下表面下方的烧结金属层,在烧结金属层下面的导热流动层,以及位于导热流动层下面的导热基底。
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公开(公告)号:US09397058B2
公开(公告)日:2016-07-19
申请号:US14563448
申请日:2014-12-08
Applicant: STATS ChipPAC, Ltd.
Inventor: Xusheng Bao , Ma Phoo Pwint Hlaing , Jian Zuo
IPC: H01L23/00 , H01L23/31 , H01L23/532 , H01L23/525
CPC classification number: H01L24/11 , H01L23/3114 , H01L23/525 , H01L23/5329 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/94 , H01L2224/02313 , H01L2224/0239 , H01L2224/024 , H01L2224/0332 , H01L2224/034 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/035 , H01L2224/03505 , H01L2224/0361 , H01L2224/03632 , H01L2224/0401 , H01L2224/05011 , H01L2224/05012 , H01L2224/05024 , H01L2224/05073 , H01L2224/05086 , H01L2224/05088 , H01L2224/05093 , H01L2224/05094 , H01L2224/05095 , H01L2224/05096 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05169 , H01L2224/05171 , H01L2224/05181 , H01L2224/05187 , H01L2224/05557 , H01L2224/05558 , H01L2224/05583 , H01L2224/05624 , H01L2224/05666 , H01L2224/05671 , H01L2224/05687 , H01L2224/1111 , H01L2224/1132 , H01L2224/11334 , H01L2224/1134 , H01L2224/1145 , H01L2224/11462 , H01L2224/11466 , H01L2224/118 , H01L2224/11849 , H01L2224/11916 , H01L2224/13006 , H01L2224/13011 , H01L2224/13022 , H01L2224/13024 , H01L2224/13078 , H01L2224/131 , H01L2224/13111 , H01L2224/13116 , H01L2224/13553 , H01L2224/1357 , H01L2224/16225 , H01L2224/16227 , H01L2224/94 , H01L2924/01322 , H01L2924/12041 , H01L2924/12042 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/301 , H01L2924/01013 , H01L2924/0105 , H01L2924/01028 , H01L2924/01079 , H01L2924/01029 , H01L2924/01047 , H01L2924/00014 , H01L2924/00013 , H01L2924/01074 , H01L2924/01007 , H01L2924/01023 , H01L2924/04941 , H01L2924/014 , H01L2924/01082 , H01L2224/11 , H01L2924/00
Abstract: A semiconductor device has a semiconductor wafer with a first conductive layer formed over a surface of the semiconductor wafer. A first insulating layer is formed over the surface of the semiconductor wafer and first conductive layer. A second conductive layer is formed over the first insulating layer and first conductive layer. A second insulating layer is formed over the first insulating layer and second conductive layer. A plurality of openings is formed in the second insulating layer in a bump formation area of the semiconductor wafer to expose the second conductive layer and reduce adverse effects of electro-migration. The openings are separated by portions of the second insulating layer. A UBM layer is formed over the openings in the second insulating layer in the bump formation area electrically connected to the second conductive layer. A bump is formed over the UBM layer.
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公开(公告)号:US09379076B2
公开(公告)日:2016-06-28
申请号:US14503795
申请日:2014-10-01
Inventor: Chen-Chih Hsieh , Hao-Yi Tsai , Chao-Wen Shih , Yung-Ping Chiang , Tsung-Yuan Yu
IPC: H01L23/31 , H01L23/544 , H01L21/78 , H01L23/00 , H01L23/522 , H01L23/528 , H01L21/56 , H01L21/768
CPC classification number: H01L24/13 , H01L21/56 , H01L21/565 , H01L21/76877 , H01L23/3114 , H01L23/3171 , H01L23/5226 , H01L23/525 , H01L23/528 , H01L23/562 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/81 , H01L2224/0231 , H01L2224/0332 , H01L2224/0345 , H01L2224/03462 , H01L2224/05569 , H01L2224/05647 , H01L2224/05655 , H01L2224/10126 , H01L2224/1132 , H01L2224/11334 , H01L2224/11848 , H01L2224/11849 , H01L2224/13006 , H01L2224/13007 , H01L2224/13022 , H01L2224/13111 , H01L2224/13116 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/16238 , H01L2224/81191 , H01L2924/014 , H01L2924/00014
Abstract: A method of manufacturing a semiconductor structure includes receiving a substrate including a die pad disposed thereon; disposing a passivation over the substrate and around the die pad; disposing a polymer over the passivation; forming a post passivation interconnect (PPI) including an elongated portion and a via portion contacting with the die pad; depositing a metallic paste on the elongated portion of the PPI by a stencil; disposing a conductive bump over the metallic paste; and disposing a molding over the PPI and around the metallic paste and the conductive bump.
Abstract translation: 一种制造半导体结构的方法包括:接收包括设置在其上的管芯焊盘的衬底; 在衬底上并围绕芯片焊盘设置钝化; 在聚合物上沉积钝化物; 形成包括细长部分和与所述管芯焊盘接触的通孔部分的后钝化互连(PPI); 通过模板将金属膏沉积在PPI的细长部分上; 在金属膏上设置导电凸块; 并且在PPI上以及金属膏和导电凸块周围设置模制品。
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9.Multiple bond via arrays of different wire heights on a same substrate 有权
Title translation: 通过不同导线高度的阵列在同一基片上的多重键合公开(公告)号:US20150380377A1
公开(公告)日:2015-12-31
申请号:US14841381
申请日:2015-08-31
Applicant: Invensas Corporation
Inventor: CYPRIAN EMEKA UZOH , Rajesh Katkar
CPC classification number: H01L25/0657 , B81B7/0074 , H01L21/4853 , H01L23/3675 , H01L23/42 , H01L23/481 , H01L23/49811 , H01L23/522 , H01L23/5383 , H01L24/02 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/17 , H01L24/24 , H01L24/32 , H01L24/33 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/81 , H01L24/94 , H01L24/97 , H01L25/0652 , H01L25/16 , H01L25/50 , H01L28/10 , H01L28/20 , H01L28/40 , H01L2224/0239 , H01L2224/0332 , H01L2224/0333 , H01L2224/0345 , H01L2224/03452 , H01L2224/03462 , H01L2224/03464 , H01L2224/0347 , H01L2224/03614 , H01L2224/0391 , H01L2224/03912 , H01L2224/03914 , H01L2224/0401 , H01L2224/04042 , H01L2224/05111 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05169 , H01L2224/05184 , H01L2224/05547 , H01L2224/05565 , H01L2224/05568 , H01L2224/05569 , H01L2224/05611 , H01L2224/05616 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/05669 , H01L2224/05684 , H01L2224/1134 , H01L2224/11462 , H01L2224/11464 , H01L2224/1147 , H01L2224/11903 , H01L2224/1191 , H01L2224/13022 , H01L2224/13023 , H01L2224/13025 , H01L2224/13082 , H01L2224/131 , H01L2224/13111 , H01L2224/13113 , H01L2224/13116 , H01L2224/13124 , H01L2224/13139 , H01L2224/13144 , H01L2224/13147 , H01L2224/13155 , H01L2224/13169 , H01L2224/13184 , H01L2224/13565 , H01L2224/13616 , H01L2224/1403 , H01L2224/14131 , H01L2224/14132 , H01L2224/14134 , H01L2224/16145 , H01L2224/16146 , H01L2224/16148 , H01L2224/16225 , H01L2224/16227 , H01L2224/16265 , H01L2224/17181 , H01L2224/24147 , H01L2224/24227 , H01L2224/244 , H01L2224/32145 , H01L2224/3303 , H01L2224/33181 , H01L2224/45015 , H01L2224/45147 , H01L2224/48091 , H01L2224/48149 , H01L2224/4903 , H01L2224/73201 , H01L2224/73253 , H01L2224/73265 , H01L2224/81192 , H01L2224/81193 , H01L2224/81825 , H01L2224/94 , H01L2224/97 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2225/06562 , H01L2225/06568 , H01L2924/00014 , H01L2924/01322 , H01L2924/12042 , H01L2924/1205 , H01L2924/1206 , H01L2924/1207 , H01L2924/1461 , H01L2924/15192 , H01L2924/15311 , H01L2924/15787 , H01L2924/15788 , H01L2924/16251 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/3841 , H01L2924/00 , H01L2924/01029 , H01L2924/014 , H01L2924/00012 , H01L2924/01074 , H01L2924/01028 , H01L2924/01082 , H01L2224/05 , H01L2224/13 , H01L2224/81 , H01L2924/20751 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/20758 , H01L2924/20759 , H01L2924/2076 , H01L2224/45099
Abstract: Apparatuses relating generally to a substrate are disclosed. In such an apparatus, first wire bond wires (“first wires”) extend from a surface of the substrate. Second wire bond wires (“second wires”) extend from the surface of the substrate. The first wires and the second wires are external to the substrate. The first wires are disposed at least partially within the second wires. The first wires are of a first height. The second wires are of a second height greater than the first height for coupling of at least one electronic component to the first wires at least partially disposed within the second wires.
Abstract translation: 公开了一般涉及衬底的装置。 在这种装置中,第一线接合线(“第一线”)从衬底的表面延伸。 第二线接合线(“第二线”)从衬底的表面延伸。 第一线和第二线在衬底外部。 第一导线至少部分地设置在第二导线内。 第一根导线是第一个高度。 第二导线的第二高度大于第一高度,用于将至少一个电子部件耦合到至少部分地设置在第二导线内的第一导线。
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公开(公告)号:US20150125995A1
公开(公告)日:2015-05-07
申请号:US14591551
申请日:2015-01-07
Applicant: Delta Electronics, Inc.
Inventor: Chia-Yen LEE , Hsin-Chang TSAI , Peng-Hsin LEE
IPC: H01L25/00 , H01L21/768 , H01L25/065
CPC classification number: H01L25/50 , H01L21/768 , H01L21/76877 , H01L21/76898 , H01L23/481 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/81 , H01L25/0657 , H01L25/074 , H01L25/18 , H01L2224/02372 , H01L2224/0332 , H01L2224/0401 , H01L2224/05009 , H01L2224/05147 , H01L2224/05548 , H01L2224/0557 , H01L2224/06181 , H01L2224/13024 , H01L2224/131 , H01L2224/13147 , H01L2224/16146 , H01L2224/16148 , H01L2224/81193 , H01L2224/81815 , H01L2924/00014 , H01L2924/12042 , H01L2924/00012 , H01L2224/05599 , H01L2924/014 , H01L2224/05552 , H01L2924/00
Abstract: A package structure including: a first semiconductor device including a first semiconductor substrate and a first electronic device, the first semiconductor device having a first side and a second side, wherein at least part of the first electronic device being adjacent to the first side, and the first semiconductor device has a via-hole formed through the first semiconductor device, wherein the via-hole has a first opening adjacent to the first side; an interconnection structure disposed in the first semiconductor device, wherein the interconnection structure includes: a via structure disposed in the via-hole without exceeding the first opening; a first pad disposed on the first side of the first semiconductor device and covering the via-hole; and a second semiconductor device vertically integrated with the first semiconductor device.
Abstract translation: 一种封装结构,包括:第一半导体器件,包括第一半导体衬底和第一电子器件,所述第一半导体器件具有第一侧面和第二侧面,其中所述第一电子器件的至少部分与所述第一侧相邻,以及 第一半导体器件具有通过第一半导体器件形成的通孔,其中通孔具有与第一侧相邻的第一开口; 布置在所述第一半导体器件中的互连结构,其中所述互连结构包括:通孔结构,其设置在所述通孔中而不超过所述第一开口; 第一焊盘,设置在所述第一半导体器件的第一侧上并覆盖所述通孔; 以及与第一半导体器件垂直集成的第二半导体器件。
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