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公开(公告)号：US10395376B2
公开(公告)日：2019-08-27
申请号：US15654503
申请日：2017-07-19
Applicant: QUALCOMM Incorporated
Inventor： Zhengming Fu , Jia Yao , Daroosh Tayebi
IPC: G06K9/00 , G06K9/32 , G06K9/46 , G06K9/62 , G06T7/20 , G06T7/70 , H04N5/341 , H04N5/374 , H04N5/378
Abstract: Techniques for motion detection are presented. An image sensor for motion detection includes a plurality of analog comparators and a two-dimensional pixel array including a plurality of rows of pixels and a plurality of columns of pixels. Each pixel is configured to convert an optical signal on the pixel into an analog signal. The two-dimensional pixel array is organized into a plurality of groups of pixels each associated with a combined group signal determined based on the analog signals from pixels in the group of pixels. Each analog comparator includes two inputs and is used to compare combined group signals generated by two groups of pixels of the plurality of groups of pixels during a same time period to generate a 1-bit inter-pixel digital signal, where each of the two groups of pixels is coupled to a corresponding input of the two inputs of the each analog comparator.
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公开(公告)号：US10129495B2
公开(公告)日：2018-11-13
申请号：US15081642
申请日：2016-03-25
Applicant: QUALCOMM Incorporated
Inventor： Zhengming Fu , Shan Lu , Jing Ling
Abstract: Techniques for direct local binary pattern (LBP) generation are presented. An image sensor for LBP generation includes a variable reference signal generator and a sensor pixel array that can generate events based on optical signals on the sensor pixel array and a reference level from the variable reference signal generator. The image sensor also includes an address encoder that can encode the addresses of the sensor pixels that generate events, and a binary image generator that can create a binary image based on the addresses of the sensor pixels that generate the events at the reference level. The image sensor may also include a local binary pattern generator configured to determine local binary pattern labels for image pixels whose binary value changes from a first binary image at a first reference level to a subsequent second binary image at a next reference level.
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公开(公告)号：US11769740B2
公开(公告)日：2023-09-26
申请号：US17494747
申请日：2021-10-05
Applicant: QUALCOMM Incorporated
Inventor： Alan Lewis , Zhengming Fu , Nan Chen , Adam Polak , Laura Fuentes , Gregory Bullard , Mark Todorovich
IPC: H01L23/00 , H01L27/144 , G06F21/75
CPC classification number: H01L23/576 , G06F21/755 , H01L27/1443
Abstract: Various embodiments include integrated approaches to detecting attempts to breach system-level or chip-level security using photo-generated currents induced by lasers or other radiation sources. Various embodiments integrate photo-detection circuits with a secure processor or other circuit in such a manner that the response to a security attack is fast enough to prevent loss of secure or private information are described. Various embodiments include circuits capable of providing a permanent record of photocurrent detection.
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公开(公告)号：US20170302866A1
公开(公告)日：2017-10-19
申请号：US15264465
申请日：2016-09-13
Applicant: QUALCOMM Incorporated
Inventor： Zhengming Fu , Soo Youn Kim , Jan Christian Huber
IPC: H04N5/347 , H04N5/3745 , H04N9/04
CPC classification number: H04N5/347 , H04N5/3559 , H04N5/37455 , H04N5/37457 , H04N9/045
Abstract: Methods, systems, computer-readable media, and apparatuses for dynamic pixel binning are presented. In one example, an image sensor system includes a plurality of sensor elements; a plurality of floating diffusion regions in communication with the plurality of sensor elements, each floating diffusion region of the plurality of floating diffusion regions configured to be selectively enabled; and at least one comparison circuit coupled to at least two floating diffusion regions of the plurality of floating diffusion regions, the comparison circuit configured to: receive input signals from the two floating diffusion regions, compare the input signals, and output a comparison signal based on the comparison of the input signals.
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公开(公告)号：US20160216723A1
公开(公告)日：2016-07-28
申请号：US14606753
申请日：2015-01-27
Applicant: QUALCOMM Incorporated
Inventor： Zhengming Fu , James Thomas Doyle , Nazanin Darbanian , Shree Krishna Pandey , Yi Cao
IPC: G05F3/08
CPC classification number: G05F3/08 , G05F1/575 , H02M3/158 , H02M3/1582 , H02M2001/0045 , H02M2003/1566
Abstract: Operational mode changes in a system-on-a-chip (SoC) integrated circuit in a complex device such as a mobile phone cause spikes in current demand which can cause voltage droops that disrupt operation of the SoC. A hybrid parallel power supply capacitively couples a switching-mode power supply and a low-dropout voltage regulator in parallel to provide high efficiency and fast response times. The low-dropout voltage regulator may include a class-AB operational transconductance amplifier driving the coupling capacitor. The switching-mode power supply and the low-dropout voltage regulator can regulate their outputs to slightly difference voltage levels. This can allow the switching-mode power supply to supply most of the SoC's current demands.
Abstract translation: 诸如移动电话等复杂设备的片上系统芯片（SoC）集成电路的运行模式变化会导致电流需求的尖峰，从而导致电压下降，从而破坏了SoC的运行。 混合并联电源并联电容耦合开关电源和低压差稳压器，以提供高效率和快速的响应时间。 低压差稳压器可以包括驱动耦合电容器的AB类运算跨导放大器。 开关电源和低压差稳压器可以将其输出调节为稍微不同的电压电平。 这可以允许开关电源供应大部分SoC的当前需求。
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Patent Agency Ranking
公开(公告)号：US11145608B2
公开(公告)日：2021-10-12
申请号：US16359319
申请日：2019-03-20
Applicant: QUALCOMM Incorporated
Inventor： Alan Lewis , Zhengming Fu , Nan Chen , Adam Polak , Laura Fuentes , Gregory Bullard , Mark Todorovich
IPC: H01L23/00 , H01L27/144 , G06F21/75
Abstract: Various embodiments include integrated approaches to detecting attempts to breach system-level or chip-level security using photo-generated currents induced by lasers or other radiation sources. Various embodiments integrate photo-detection circuits with a secure processor or other circuit in such a manner that the response to a security attack is fast enough to prevent loss of secure or private information are described. Various embodiments include circuits capable of providing a permanent record of photocurrent detection.
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公开(公告)号：US10313610B2
公开(公告)日：2019-06-04
申请号：US15264465
申请日：2016-09-13
Applicant: QUALCOMM Incorporated
Inventor： Zhengming Fu , Soo Youn Kim , Jan Christian Huber
IPC: H04N5/347 , H04N5/3745 , H04N9/04 , H04N5/355
Abstract: Methods, systems, computer-readable media, and apparatuses for dynamic pixel binning are presented. In one example, an image sensor system includes a plurality of sensor elements; a plurality of floating diffusion regions in communication with the plurality of sensor elements, each floating diffusion region of the plurality of floating diffusion regions configured to be selectively enabled; and at least one comparison circuit coupled to at least two floating diffusion regions of the plurality of floating diffusion regions, the comparison circuit configured to: receive input signals from the two floating diffusion regions, compare the input signals, and output a comparison signal based on the comparison of the input signals.
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公开(公告)号：US09654002B2
公开(公告)日：2017-05-16
申请号：US14918893
申请日：2015-10-21
Applicant: QUALCOMM Incorporated
Inventor： James Thomas Doyle , Farsheed Mahmoudi , Chuang Zhang , Zhengming Fu , Sassan Shahrokhinia
CPC classification number: H02M3/158 , H02M1/38 , H02M3/157 , H02M2001/0012 , H02M2001/0048 , Y02B70/1491
Abstract: An apparatus and method are disclosed for efficiently using power at a voltage regulator, such as a synchronous buck converter. The synchronous buck converter includes a first switch and a second switch operated by a first control signal and a second control signal, respectively, where the first and second control signals have a corresponding phase difference. A logic circuit measures a duty cycle of an input pulse width modulated (PWM) signal against iterative changes of the phase difference between the first control signal and the second control signal. The logic circuit selects a phase difference corresponding to a minimum value of the PWM signal, thereby optimizing dead time at the synchronous buck converter. The logic circuit may include a Digital Pulse Width Modulator.
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公开(公告)号：US20190026901A1
公开(公告)日：2019-01-24
申请号：US15654503
申请日：2017-07-19
Applicant: QUALCOMM Incorporated
Inventor： Zhengming Fu , Jia Yao , Daroosh Tayebi
CPC classification number: G06T7/20 , G06K9/00201 , G06K9/3233 , G06K9/46 , G06K9/6202 , G06T7/70 , H04N5/341 , H04N5/374 , H04N5/378
Abstract: Techniques for motion detection are presented. An image sensor for motion detection includes a plurality of analog comparators and a two-dimensional pixel array including a plurality of rows of pixels and a plurality of columns of pixels. Each pixel is configured to convert an optical signal on the pixel into an analog signal. The two-dimensional pixel array is organized into a plurality of groups of pixels each associated with a combined group signal determined based on the analog signals from pixels in the group of pixels. Each analog comparator includes two inputs and is used to compare combined group signals generated by two groups of pixels of the plurality of groups of pixels during a same time period to generate a 1-bit inter-pixel digital signal, where each of the two groups of pixels is coupled to a corresponding input of the two inputs of the each analog comparator.
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公开(公告)号：US09748847B2
公开(公告)日：2017-08-29
申请号：US14863269
申请日：2015-09-23
Applicant: QUALCOMM Incorporated
Inventor： Farsheed Mahmoudi , James Thomas Doyle , Chuang Zhang , Zhengming Fu
CPC classification number: H02M3/1584 , G06F1/3296 , H02M1/088 , H02M3/157 , H02M2001/0048 , H02M2001/0054 , Y02B70/1491
Abstract: An apparatus and method are disclosed for providing efficient operation in a feedback loop having a synchronous buck converter. The synchronous buck converter includes a plurality of individually selectable phases, where each of the phases has a plurality of individually selectable and parallel switching legs. The circuit stores information that associates multiple different load values with respective configuration settings that each define a number of phases and a number of switching legs. As the load changes, the circuit measures the load and selects an appropriate configuration setting. The circuit applies the selected configuration setting to operate the number of phases and a number of parallel switching legs in the buck converter.
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