公开(公告)号：US20150339250A1

公开(公告)日：2015-11-26

申请号：US14429338

申请日：2012-10-29

Applicant: QUALCOMM INCORPORATED

Inventor： Hongchun Yu

IPC: G06F13/40 ,  G06F13/42

CPC classification number: G06F13/4022 ,  G06F13/4068 ,  G06F13/4221 ,  G06F13/4282 ,  H04M1/2535

Abstract: A system and method are disclosed that allow a host device to communicate with an external device using either Ethernet communications or USB communications provided via a USB port and a USB connection (e.g., a USB cable). The host device may include a processor, an Ethernet media access control (MAC) circuit coupled to the processor, a USB controller coupled to the processor, a USB port to couple to the external device via the USB connection, and a transceiver coupled between the USB port and either the Ethernet MAC circuit or the USB controller in response to a mode select signal. The host device may also include a detection circuit that generates the mode select signal in response to determining whether the external device is a USB device or an Ethernet device.

Abstract translation: 公开了允许主机设备使用通过USB端口和USB连接（例如，USB电缆）提供的以太网通信或USB通信与外部设备进行通信的系统和方法。 主机设备可以包括处理器，耦合到处理器的以太网媒体访问控制（MAC）电路，耦合到处理器的USB控制器，经由USB连接耦合到外部设备的USB端口以及耦合在该处理器之间的收发器 USB端口和以太网MAC电路或USB控制器，以响应模式选择信号。 主机设备还可以包括响应于确定外部设备是USB设备还是以太网设备而产生模式选择信号的检测电路。

公开(公告)号：US20170257104A1

公开(公告)日：2017-09-07

申请号：US15428059

申请日：2017-02-08

Applicant: QUALCOMM Incorporated

Inventor： Hongchun Yu ,  Weiran Lin ,  Shuguang Li ,  Guangming Yin

IPC: H03L7/081 ,  H04L7/033

CPC classification number: H03L7/0814 ,  H03K2005/00058 ,  H03L7/093 ,  H04L7/0331

Abstract: Systems, methods, and apparatus are disclosed that that can improve robustness of digital phase locked loop (PLL) circuits. A method performed by a clock generation device includes generating a plurality of phase-shifted signals, each of the plurality of phase-shifted signals having a phase shift with respect to a base clock signal that is unique within the plurality of phase-shifted signals, selecting a first phase-shifted signal as an output signal, generating a first phase control word indicative of a second phase-shifted signal when the second signal has a closer phase relationship with a reference signal than the first signal, refraining from selecting the second signal as the output signal while either of the first signal and the second signal is in a first signaling state, and selecting as the output signal, the second signal when the first signal and the second signal are in a second signaling state.

公开(公告)号：US20150171892A1

公开(公告)日：2015-06-18

申请号：US14382279

申请日：2012-03-23

Applicant: QUALCOMM INCORPORATED

Inventor： Hongchun Yu

IPC: H03M9/00 ,  H04J3/04 ,  H04L12/24 ,  H04L29/06

CPC classification number: H03M9/00 ,  H04J3/047 ,  H04J3/0697 ,  H04L25/4908 ,  H04L41/0803 ,  H04L69/18

Abstract: A configurable media independent interface in an integrated circuit device includes a first plurality of channels and a second plurality of channels, wherein each channel of the first and second pluralities includes a transmit path. The interface also includes a first serializer configurable to serialize transmit data for the first and second pluralities of channels in a first mode and to serialize transmit data for the first plurality of channels in a second mode, and a second serializer configurable to be disabled in the first mode and to serialize data for the second plurality of channels in the second mode.

Abstract translation: 集成电路设备中的可配置媒体独立接口包括第一多个信道和第二多个信道，其中第一和第二多个信道的每个信道包括发送路径。 该接口还包括可配置为以第一模式串行化用于第一和第二多个信道的发送数据的第一串行器，并且以第二模式串行化第一多个信道的发送数据，以及可配置为在第二模式中被禁用的第二串行器 并且在第二模式中串行化第二多个信道的数据。

公开(公告)号：US09807036B2

公开(公告)日：2017-10-31

申请号：US14654152

申请日：2012-12-20

Applicant: QUALCOMM INCORPORATED

Inventor： Hongchun Yu ,  Honglu Chen ,  Chi Huang ,  Wenjun Zhang

IPC: H04L12/28 ,  H04L27/00 ,  G06F1/00 ,  G06F3/00 ,  H04L12/935 ,  H04L12/413 ,  H04L12/40

CPC classification number: H04L49/30 ,  H04L12/40013 ,  H04L12/413

Abstract: A method of communication between an Ethernet Media Access Controller (MAC) and a physical interface (PHY) is disclosed. The method includes establishing communication between the MAC and the PHY via a first serial link in accordance with a Serializer Deserializer (SERDES) protocol. In a data transfer mode, data is transferred along the first serial link. Idle frames are transferred within an idle time gap along the link in an idle mode. The PHY is managed by encoding Management Data Input/Output (MDIO) information in one or more MDIO frames, and transferring the one or more MDIO frames within the idle time gap along the first serial link.

公开(公告)号：US20150326504A1

公开(公告)日：2015-11-12

申请号：US14654152

申请日：2012-12-20

Applicant: QUALCOMM INCORPORATED

Inventor： Hongchun Yu ,  Hunglu Chen ,  Chi Huang ,  Wenjun Zhang

IPC: H04L12/935

CPC classification number: H04L49/30 ,  H04L12/40013 ,  H04L12/413

Abstract: A method of communication between an Ethernet Media Access Controller (MAC) and a physical interface (PHY) is disclosed. The method includes establishing communication between the MAC and the PHY via a first serial link in accordance with a Serializer Deserializer (SERDES) protocol. In a data transfer mode, data is transferred along the first serial link. Idle frames are transferred within an idle time gap along the link in an idle mode. The PHY is managed by encoding Management Data Input/Output (MDIO) information in one or more MDIO frames, and transferring the one or more MDIO frames within the idle time gap along the first serial link.

Abstract translation: 公开了以太网介质访问控制器（MAC）和物理接口（PHY）之间的通信方法。 该方法包括根据串行器解串器（SERDES）协议，经由第一串行链路建立MAC与PHY之间的通信。 在数据传输模式下，沿着第一串行链路传送数据。 空闲帧在空闲模式下沿着链路在空闲时间间隙内传送。 PHY通过在一个或多个MDIO帧中对管理数据输入/输出（MDIO）信息进行编码来管理，并且沿着第一串行链路传送空闲时间间隙内的一个或多个MDIO帧。