公开(公告)号：US20150213869A1

公开(公告)日：2015-07-30

申请号：US14498376

申请日：2014-09-26

Applicant: QUALCOMM Incorporated

Inventor： Wenqing WU ,  Kendrick Hoy Leong YUEN ,  Karim ARABI

IPC: G11C11/16

CPC classification number: G11C11/1693 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/18 ,  G11C14/0081 ,  H03K3/356008 ,  H03K3/35625 ,  H03K3/59 ,  H03K19/18

Abstract: Systems and methods are directed to a single-phase non-volatile flip-flop (NVFF), which includes a master stage formed from a dual giant spin Hall effect (GSHE)-magnetic tunnel junction (MTJ) structure, the dual GSHE-MTJ structure comprising a first GSHE-MTJ and a second GSHE-MTJ coupled between a first combined terminal and a second combined terminal, and a slave stage formed from a first inverter coupled to a second inverter. During a single clock cycle of a clock, a first data value is read out from the slave stage when a clock is in a high state and a second data value is written into the master stage, when the clock is in a low state. The first and second inverters are cross coupled in a latch configuration to hold the first data value as an output, when the clock is in the low state.

Abstract translation: 系统和方法涉及单相非易失性触发器（NVFF），其包括由双巨型旋转霍尔效应（GSHE） - 磁性隧道结（MTJ）结构形成的主级，双GSHE-MTJ 包括耦合在第一组合终端和第二组合终端之间的第一GSHE-MTJ和第二GSHE-MTJ的结构，以及由耦合到第二逆变器的第一逆变器形成的从级。 在时钟的单个时钟周期中，当时钟处于低状态时，当时钟处于高状态并且第二数据值被写入主站时，从从站读出第一数据值。 当时钟处于低电平状态时，第一和第二反相器以锁存配置交叉耦合以将第一数据值保持为输出。

公开(公告)号：US20150213865A1

公开(公告)日：2015-07-30

申请号：US14451510

申请日：2014-08-05

Applicant: QUALCOMM Incorporated

Inventor： Wenqing WU ,  Raghu Sagar MADALA ,  Kendrick Hoy Leong YUEN ,  Karim ARABI

IPC: G11C11/16 ,  G11C11/18 ,  H01L43/14

CPC classification number: G11C11/161 ,  G11C11/16 ,  G11C11/1659 ,  G11C11/1675 ,  G11C11/18 ,  H01L43/14

Abstract: Systems and methods are directed to a memory element comprising a hybrid giant spin Hall effect (GSHE)-spin transfer torque (STT) magnetoresistive random access memory (MRAM) element, which includes a GSHE strip formed between a first terminal (A) and a second terminal (B), and a magnetic tunnel junction (MTJ), with a free layer of the MTJ interfacing the GSHE strip, and a fixed layer of the MTJ coupled to a third terminal (C). The orientation of the easy axis of the free layer is perpendicular to the magnetization created by electrons traversing the GSHE strip between the first terminal and the second terminal, such that the free layer of the MTJ is configured to switch based on a first charge current injected from/to the first terminal to/from the second terminal and a second charge current injected/extracted through the third terminal into/out of the MTJ via the third terminal (C).

公开(公告)号：US20150213867A1

公开(公告)日：2015-07-30

申请号：US14479539

申请日：2014-09-08

Applicant: QUALCOMM Incorporated

Inventor： Wenqing WU ,  Kendrick Hoy Leong YUEN ,  Karim ARABI

IPC: G11C11/16 ,  H01L43/14 ,  G11C11/18 ,  G11C11/56

CPC classification number: G11C11/1675 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/18 ,  G11C11/5607 ,  H01L43/14

Abstract: Systems and methods are directed to multi-level cell (MLC) comprising: two or more programmable elements coupled to a common access transistor, wherein each one of the two or more programmable elements has a corresponding unique set of two or more switching resistances and two or more switching currents characteristics, such that combinations of the two or more programmable elements configured in the respective two or more switching resistance correspond to multi-bit binary states controllable by passing switching currents through the common access transistor. Each one of the two or more programmable elements includes one or more hybrid giant spin Hall effect (GSHE)-spin transfer torque (STT) magnetoresistive random access memory (MRAM) cell, with two or more hybrid GSHE-STT MRAM cells coupled in parallel.

Abstract translation: 系统和方法涉及多级单元（MLC），其包括：耦合到公共存取晶体管的两个或多个可编程元件，其中两个或多个可编程元件中的每一个具有两个或更多个开关电阻的对应的唯一集合，以及两个 或更多的开关电流特性，使得在相应的两个或更多个开关电阻中配置的两个或多个可编程元件的组合对应于通过将开关电流通过公共存取晶体管而可控的多位二进制状态。 两个或多个可编程元件中的每一个包括一个或多个混合巨型旋转霍尔效应（GSHE） - 转移转矩（STT）磁阻随机存取存储器（MRAM）单元，其中两个或多个并联的GSHE-STT MRAM单元并联 。

公开(公告)号：US20150213866A1

公开(公告)日：2015-07-30

申请号：US14479832

申请日：2014-09-08

Applicant: QUALCOMM Incorporated

Inventor： Wenqing WU ,  Raghu Sagar MADALA ,  Kendrick Hoy Leong YUEN ,  Karim ARABI

IPC: G11C11/16 ,  G11C11/18 ,  H01L43/14

CPC classification number: G11C11/161 ,  G11C11/16 ,  G11C11/1659 ,  G11C11/1675 ,  G11C11/18 ,  H01L43/14

Abstract: Systems and methods are directed to a memory element comprising a hybrid giant spin Hall effect (GSHE)-spin transfer torque (STT) magnetoresistive random access memory (MRAM) element, which includes a GSHE strip formed between a first terminal (A) and a second terminal (B), and a magnetic tunnel junction (MTJ), with a free layer of the MTJ interfacing the GSHE strip, and a fixed layer of the MTJ coupled to a third terminal (C). The orientation of the easy axis of the free layer is perpendicular to the magnetization created by electrons traversing the GSHE strip between the first terminal and the second terminal, such that the free layer of the MTJ is configured to switch based on a first charge current injected from/to the first terminal to/from the second terminal and a second charge current injected/extracted through the third terminal into/out of the MTJ via the third terminal (C).

Abstract translation: 系统和方法涉及包括混合巨型旋转霍尔效应（GSHE） - 旋转转矩（STT）磁阻随机存取存储器（MRAM）元件的存储元件，其包括形成在第一端子（A）和第二端子 第二端子（B）和磁性隧道结（MTJ），具有与GSHE条带接合的MTJ的自由层和耦合到第三端子（C）的MTJ的固定层。 自由层的容易轴的取向垂直于通过在第一端子和第二端子之间穿过GSHE带的电子产生的磁化，使得MTJ的自由层被配置为基于注入的第一充电电流来切换 从第一端子到第二端子和从第二端子到第一端子的第二充电电流经由第三端子（C）通过第三端子注入/提取出MTJ的第二充电电流。

公开(公告)号：US20170010864A1

公开(公告)日：2017-01-12

申请号：US14882255

申请日：2015-10-13

Applicant: QUALCOMM Incorporated

Inventor： David JACOBSON ,  Xiaochun ZHU ,  Wenqing WU ,  Kendrick Hoy Leong YUEN ,  Seung KANG

IPC: G06F7/58 ,  H03M7/30 ,  G06F5/01

CPC classification number: G06F7/588 ,  G06F5/01 ,  G06F2205/00 ,  G06F2207/581 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1695 ,  G11C11/1697 ,  H03M7/30

Abstract: An entropy source and a random number (RN) generator are disclosed. In one aspect, a low-energy entropy source includes a magneto-resistive (MR) element and a sensing circuit. The MR element is applied a static current and has a variable resistance determined based on magnetization of the MR element. The sensing circuit senses the resistance of the MR element and provides random values based on the sensed resistance of the MR element. In another aspect, a RN generator includes an entropy source and a post-processing module. The entropy source includes at least one MR element and provides first random values based on the at least one MR element. The post-processing module receives and processes the first random values (e.g., based on a cryptographic hash function, an error detection code, a stream cipher algorithm, etc.) and provides second random values having improved randomness characteristics.

Abstract translation: 公开了熵源和随机数（RN）生成器。 一方面，低能量熵源包括磁阻（MR）元件和感测电路。 MR元件施加静态电流，并具有基于MR元件的磁化确定的可变电阻。 感测电路感测MR元件的电阻，并根据检测到的MR元件的电阻提供随机值。 另一方面，RN发生器包括熵源和后处理模块。 熵源包括至少一个MR元素，并且基于至少一个MR元素提供第一随机值。 后处理模块接收并处理第一随机值（例如，基于加密散列函数，错误检测码，流密码算法等）并提供具有改进的随机特性的第二随机值。

公开(公告)号：US20160276576A1

公开(公告)日：2016-09-22

申请号：US15170851

申请日：2016-06-01

Applicant: QUALCOMM Incorporated

Inventor： William H. XIA ,  Wenqing WU ,  Kendrick H. YUEN ,  Abhishek BANERJEE ,  Xia LI ,  Seung H. KANG ,  Jung Pill KIM

IPC: H01L43/02 ,  H01L43/08 ,  G11C11/16 ,  H01L43/12

CPC classification number: H01L43/02 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  G11C11/1693 ,  H01L43/08 ,  H01L43/12

Abstract: A memory cell includes an elongated first electrode coupled to a magnetic tunnel junction (MTJ) structure and an elongated second electrode aligned with the elongated first electrode coupled to the MTJ structure. The elongated electrodes are configured to direct mutually additive portions of a switching current induced magnetic field through the MTJ. The mutually additive portions enhance switching of the MTJ in response to application of the switching current.

Abstract translation: 存储单元包括耦合到磁隧道结（MTJ）结构的细长第一电极和与耦合到MTJ结构的细长第一电极对准的细长第二电极。 细长电极被配置为引导开关电流感应磁场的相互添加部分通过MTJ。 响应于开关电流的应用，相互添加的部分增强MTJ的切换。

公开(公告)号：US20150213868A1

公开(公告)日：2015-07-30

申请号：US14498336

申请日：2014-09-26

Applicant: QUALCOMM Incorporated

Inventor： Wenqing WU ,  Kendrick Hoy Leong YUEN ,  Karim ARABI

IPC: G11C11/16

CPC classification number: G11C11/1693 ,  G11C11/155 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/18 ,  G11C14/0081 ,  H03K3/356008 ,  H03K3/35625 ,  H03K3/45

Abstract: Systems and methods are directed to a three-phase non-volatile flip-flop (NVFF), which includes a master stage formed from a dual giant spin Hall effect (GSHE)-magnetic tunnel junction (MTJ) structure, with a first GSHE-MTJ and a second GSHE-MTJ coupled between a first combined terminal and a second combined terminal, and a slave stage formed from a first inverter cross-coupled with a second inverter. A first data value is read out from the slave stage during a read phase of the same clock cycle that a second data value is written into the master stage during a write phase. The three-phase NVFF includes three control signals, for controlling an initialization phase of the slave stage, the read phase, and the write phase.

Abstract translation: 系统和方法涉及三相非易失性触发器（NVFF），其包括由双巨型旋转霍尔效应（GSHE） - 磁性隧道结（MTJ）结构形成的主级，其具有第一GSHE- MTJ和耦合在第一组合终端和第二组合终端之间的第二GSHE-MTJ，以及由与第二逆变器交叉耦合的第一反相器形成的从级。 在写入阶段期间，将第二数据值写入主级的相同时钟周期的读取阶段，从从属级读出第一数据值。 三相NVFF包括三个控制信号，用于控制从站的初始化阶段，读取阶段和写入阶段。