公开(公告)号：US20140167292A1

公开(公告)日：2014-06-19

申请号：US14105281

申请日：2013-12-13

Applicant: Renesas Electronics Corporation

Inventor： Yoshihiro MASUMURA ,  Hideki SASAKI ,  Toshiharu OKAMOTO

IPC: H01L25/18 ,  H01L23/00

CPC classification number: H01L25/18 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45124 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/45164 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48465 ,  H01L2224/48471 ,  H01L2224/48479 ,  H01L2224/4848 ,  H01L2224/48499 ,  H01L2224/48624 ,  H01L2224/48647 ,  H01L2224/48724 ,  H01L2224/48747 ,  H01L2224/48824 ,  H01L2224/48847 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/85051 ,  H01L2224/92247 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15174 ,  H01L2924/15183 ,  H01L2924/15311 ,  H01L2924/15788 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/20751 ,  H01L2924/01079 ,  H01L2224/4554

Abstract: The present invention provides a multichip package in which a first semiconductor chip having an RF analog circuit area and a digital circuit area, and a second semiconductor chip having a digital circuit area are plane-arranged over an organic multilayer wiring board and coupled to each other by bonding wires. In the multichip package, the first semiconductor chip is made thinner than the second semiconductor chip.

Abstract translation: 本发明提供一种多芯片封装，其中具有RF模拟电路区域和数字电路区域的第一半导体芯片以及具有数字电路区域的第二半导体芯片平面排列在有机多层布线板上并彼此耦合 通过接合线。 在多芯片封装中，使第一半导体芯片比第二半导体芯片薄。