公开(公告)号：US20170062440A1

公开(公告)日：2017-03-02

申请号：US15248159

申请日：2016-08-26

Applicant: Renesas Electronics Corporation

Inventor： Tsuyoshi ARIGANE ,  Digh HISAMOTO

IPC: H01L27/115 ,  H01L21/3213 ,  H01L29/423 ,  H01L21/28 ,  H01L29/792 ,  H01L29/66

CPC classification number: H01L27/1157 ,  H01L21/32133 ,  H01L27/11565 ,  H01L27/11573 ,  H01L29/40117 ,  H01L29/42344 ,  H01L29/42368 ,  H01L29/66833 ,  H01L29/792

Abstract: A property of a semiconductor device having a non-volatile memory is improved. A semiconductor device, which has a control gate electrode part and a memory gate electrode part placed above a semiconductor substrate of a non-volatile memory, is configured as follows. A thick film portion is formed in an end portion of the control gate insulating film on the memory gate electrode part side, below the control gate electrode part. According to this configuration, even when holes are efficiently injected to a corner portion of the memory gate electrode part by an FN tunnel erasing method, electrons can be efficiently injected to the corner portion of the memory gate electrode part by an SSI injection method. Thus, a mismatch of the electron/hole distribution can be moderated, so that the retention property of the memory cell can be improved.

Abstract translation: 改善了具有非易失性存储器的半导体器件的特性。 具有设置在非易失性存储器的半导体衬底上方的控制栅电极部分和存储栅电极部分的半导体器件被配置如下。 在控制栅绝缘膜的存储栅电极部分侧的控制栅电极部分的下方形成厚膜部分。 根据该结构，即使通过FN隧道擦除法将存储器栅电极部的角部高效地注入孔，也可以通过SSI注入法将电子有效地注入到存储栅电极部的角部。 因此，可以缓和电子/空穴分布的不匹配，从而可以提高存储单元的保持性。

公开(公告)号：US20160379713A1

公开(公告)日：2016-12-29

申请号：US15152391

申请日：2016-05-11

Applicant: Renesas Electronics Corporation

Inventor： Tsuyoshi ARIGANE ,  Daisuke Okada ,  Digh Hisamoto

IPC: G11C16/04 ,  H01L29/51 ,  H01L27/115 ,  G11C16/14 ,  H01L29/423

CPC classification number: G11C16/0466 ,  G11C16/0483 ,  G11C16/14 ,  G11C16/344 ,  H01L27/11568 ,  H01L27/1157 ,  H01L29/42344 ,  H01L29/511 ,  H01L29/518 ,  H01L29/792

Abstract: A first potential and a second potential lower than the first potential are applied to a first end of a memory gate electrode part of the nonvolatile memory and to a second end of the memory gate electrode part, respectively, so that a current is caused to flow in a direction in which the memory gate electrode part extends, then, a hole is injected from the memory gate electrode part into a charge accumulating part below it, therefore, an electron accumulated in the charge accumulating part is eliminated. By causing the current to flow through the memory gate electrode part of a memory cell region as described above, Joule heat can be generated to heat the memory cell. Consequently, in the erasing by a FN tunneling method in which the erasing characteristics degrade at a low temperature, the erasing speed can be improved by heating the memory gate electrode part.

Abstract translation: 低于第一电位的第一电势和第二电位被分别施加到非易失性存储器的存储栅电极部分的第一端和存储栅电极部分的第二端，使得电流流过 在存储栅电极部分延伸的方向上，从存储栅电极部分注入空穴到其下方的电荷累积部分，因此，积累在电荷累积部分中的电子被消除。 通过使电流流过如上所述的存储单元区域的存储栅电极部分，可以产生焦耳热以加热存储单元。 因此，在擦除特性在低温下劣化的FN隧穿法的擦除中，通过加热存储栅电极部分可以提高擦除速度。

公开(公告)号：US20150270279A1

公开(公告)日：2015-09-24

申请号：US14664493

申请日：2015-03-20

Applicant: Renesas Electronics Corporation

Inventor： Tsuyoshi ARIGANE ,  Digh HISAMOTO ,  Daisuke OKADA

IPC: H01L27/115 ,  H01L29/66 ,  H01L29/49 ,  H01L21/762 ,  H01L29/423 ,  H01L21/306 ,  H01L21/28 ,  H01L29/06 ,  H01L29/792 ,  H01L29/51

CPC classification number: H01L27/11568 ,  H01L21/28282 ,  H01L21/76224 ,  H01L21/76229 ,  H01L29/42344 ,  H01L29/66545 ,  H01L29/66833 ,  H01L29/792

Abstract: A memory gate is formed of a first memory gate including a second gate insulating film made of a second insulating film and a first memory gate electrode, and a second memory gate including a third gate insulating film made of a third insulating film and a second memory gate electrode. In addition, the lower surface of the second memory gate electrode is located lower in level than the lower surface of the first memory gate electrode. As a result, during an erase operation, an electric field is concentrated on the corner portion of the first memory gate electrode which is located closer to a selection gate and a semiconductor substrate and on the corner portion of the second memory gate electrode which is located closer to the first memory gate and the semiconductor substrate. This allows easy injection of holes into each of the second and third insulating films.

Abstract translation: 存储栅极由包括由第二绝缘膜和第一存储栅电极构成的第二栅绝缘膜的第一存储栅形成，以及包括由第三绝缘膜和第二存储器构成的第三栅绝缘膜的第二存储栅 栅电极。 此外，第二存储栅电极的下表面位于比第一存储栅电极的下表面更低的电平。 结果，在擦除操作期间，电场集中在位于更靠近选择栅极和半导体衬底的位于第一存储栅电极的角部上，并且位于位于第二存储栅电极的拐角部分 更靠近第一存储器栅极和半导体衬底。 这允许容易地将孔注入到每个第二和第三绝缘膜中。