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    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    3.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开

    公开(公告)号：US20200373306A1

    公开(公告)日：2020-11-26

    申请号：US16991738

    申请日：2020-08-12

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： JIN A KIM ,  Sun Young Lee ,  Yong Kwan Kim ,  Ji Young Kim ,  Chang Hyun Cho

    IPC分类号： H01L27/108 ,  H01L21/66

    摘要： A method of fabricating a semiconductor device. A cell area and a core area is defined in a substrate. A bit line structure disposed in the cell area is provided. A gate structure disposed in the core area is provided, and a core capping film disposed on the gate structure is provided. A height of the core capping film is greater than a height of the bit line structure. A first contact film is formed on the bit line structure. A second contact film is formed on the core capping film. A mask is formed on the first contact film. An upper surface of the core capping film is exposed using the mask. The first contact film is etched until a height of the first contact film becomes less than a height of the bit line structure using an etching process. In the etching process, an etching rate for the first contact film is greater than etching rates for the bit line structure and the core capping film.

    Semiconductor device and method of fabricating the same
    4.
    发明授权
    Semiconductor device and method of fabricating the same 有权

    公开(公告)号：US10804277B2

    公开(公告)日：2020-10-13

    申请号：US15718737

    申请日：2017-09-28

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Jin A Kim ,  Sun Young Lee ,  Yong Kwan Kim ,  Ji Young Kim ,  Chang Hyun Cho

    IPC分类号： H01L27/108 ,  H01L21/66

    摘要： A method of fabricating a semiconductor device. A cell area and a core area is defined in a substrate. A bit line structure disposed in the cell area is provided. A gate structure disposed in the core area is provided, and a core capping film disposed on the gate structure is provided. A height of the core capping film is greater than a height of the bit line structure. A first contact film is formed on the bit line structure. A second contact film is formed on the core capping film. A mask is formed on the first contact film. An upper surface of the core capping film is exposed using the mask. The first contact film is etched until a height of the first contact film becomes less than a height of the bit line structure using an etching process. In the etching process, an etching rate for the first contact film is greater than etching rates for the bit line structure and the core capping film.

    Semiconductor memory device and method of fabricating the same
    5.
    发明授权
    Semiconductor memory device and method of fabricating the same 有权

    公开(公告)号：US10665592B2

    公开(公告)日：2020-05-26

    申请号：US16108786

    申请日：2018-08-22

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Jungwoo Song ,  Kwangmin Kim ,  Jun Ho Lee ,  Hyuckjin Kang ,  Yong Kwan Kim ,  Sangyeon Han ,  Seguen Park

    IPC分类号： H01L29/06 ,  H01L27/108 ,  H01L23/532 ,  H01L27/24 ,  H01L27/22

    摘要： Provided are a semiconductor memory device and a method of fabricating the same. The semiconductor memory device may include: a first impurity doped region and a second impurity doped region spaced apart from each other in a semiconductor substrate, a bit line electrically connected to the first impurity doped region and crossing over the semiconductor substrate, a storage node contact electrically connected to the second impurity doped region, a first spacer and a second spacer disposed between the bit line and the storage node contact, and an air gap region disposed between the first spacer and the second spacer. The first spacer may cover a sidewall of the bit line, and the second spacer may be adjacent to the storage node contact. A top end of the first spacer may have a height higher than a height of a top end of the second spacer.

    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME
    7.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME 审中-公开

    公开(公告)号：US20190164975A1

    公开(公告)日：2019-05-30

    申请号：US16108786

    申请日：2018-08-22

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： JUNGWOO SONG ,  Kwangmin Kim ,  Jun Ho Lee ,  Hyuckjin Kang ,  Yong Kwan Kim ,  Sangyeon Han ,  Seguen Park

    IPC分类号： H01L27/108 ,  H01L23/532 ,  H01L29/06

    摘要： Provided are a semiconductor memory device and a method of fabricating the same. The semiconductor memory device may include: a first impurity doped region and a second impurity doped region spaced apart from each other in a semiconductor substrate, a bit line electrically connected to the first impurity doped region and crossing over the semiconductor substrate, a storage node contact electrically connected to the second impurity doped region, a first spacer and a second spacer disposed between the bit line and the storage node contact, and an air gap region disposed between the first spacer and the second spacer. The first spacer may cover a sidewall of the bit line, and the second spacer may be adjacent to the storage node contact. A top end of the first spacer may have a height higher than a height of a top end of the second spacer.

    Semiconductor devices and method of manufacturing the same
    8.
    发明授权
    Semiconductor devices and method of manufacturing the same 有权
    半导体器件及其制造方法

    公开(公告)号：US08981468B2

    公开(公告)日：2015-03-17

    申请号：US13943208

    申请日：2013-07-16

    申请人： Samsung Electronics Co., Ltd.

    发明人： Ki-hyung Nam ,  Yong Kwan Kim ,  Chan Ho Park ,  Pulunsol Cho

    IPC分类号： H01L29/78 ,  H01L29/66 ,  H01L45/00 ,  H01L27/22

    CPC分类号： H01L29/7831 ,  H01L27/228 ,  H01L27/2454 ,  H01L29/66484 ,  H01L45/06 ,  H01L45/085 ,  H01L45/144 ,  H01L45/145

    摘要： Disclosed are semiconductor devices and methods of manufacturing the same. The semiconductor device includes active portions defined in a semiconductor substrate, a device isolation pattern in a trench formed between the active portions, a gate electrode in a gate recess region crossing the active portions and the device isolation pattern, a gate dielectric layer between the gate electrode and an inner surface of the gate recess region, and a first ohmic pattern and a second ohmic pattern on each of the active portions at both sides of the gate electrode, respectively. The first and second ohmic patterns include a metal-semiconductor compound, and a top surface of the device isolation pattern at both sides of the gate recess region is recessed to be lower than a level of a top surface of the semiconductor substrate.

    摘要翻译： 公开了半导体器件及其制造方法。 半导体器件包括限定在半导体衬底中的有源部分，在有源部分之间形成的沟槽中的器件隔离图案，与有源部分交叉的栅极凹部区域中的栅极电极和器件隔离图案，栅极电介质层 电极和栅极凹陷区域的内表面，以及分别在栅电极两侧的每个有源部分上的第一欧姆图案和第二欧姆图案。 第一和第二欧姆模式包括金属半导体化合物，并且栅极凹部区域的两侧的器件隔离图案的顶表面凹陷以低于半导体衬底的顶表面的电平。

    Semiconductor memory device and method of fabricating the same
    9.
    发明授权
    Semiconductor memory device and method of fabricating the same 有权

    公开(公告)号：US11114440B2

    公开(公告)日：2021-09-07

    申请号：US16805066

    申请日：2020-02-28

    申请人： SAMSUNG ELECTRONICS CO., LTD.

    发明人： Jungwoo Song ,  Kwangmin Kim ,  Jun Ho Lee ,  Hyuckjin Kang ,  Yong Kwan Kim ,  Sangyeon Han ,  Seguen Park

    IPC分类号： H01L21/768 ,  H01L27/108 ,  H01L29/06 ,  H01L23/532 ,  H01L27/24 ,  H01L27/22

    摘要： Provided are a semiconductor memory device and a method of fabricating the same. The semiconductor memory device may include: a first impurity doped region and a second impurity doped region spaced apart from each other in a semiconductor substrate, a bit line electrically connected to the first impurity doped region and crossing over the semiconductor substrate, a storage node contact electrically connected to the second impurity doped region, a first spacer and a second spacer disposed between the bit line and the storage node contact, and an air gap region disposed between the first spacer and the second spacer. The first spacer may cover a sidewall of the bit line, and the second spacer may be adjacent to the storage node contact. A top end of the first spacer may have a height higher than a height of a top end of the second spacer.

    Semiconductor devices and methods of fabricating the same
    10.
    发明授权
    Semiconductor devices and methods of fabricating the same 有权

    公开(公告)号：US10796950B2

    公开(公告)日：2020-10-06

    申请号：US16238172

    申请日：2019-01-02

    申请人： Samsung Electronics Co., Ltd.

    发明人： Myeong-Dong Lee ,  Keunnam Kim ,  Dongryul Lee ,  Minseong Choi ,  Jimin Choi ,  Yong Kwan Kim ,  Changhyun Cho ,  Yoosang Hwang

    IPC分类号： H01L21/76 ,  H01L21/768 ,  H01L27/108 ,  H01L23/532 ,  H01L23/535

    摘要： According to some embodiments, a semiconductor device may include gate structures on a substrate; first and second impurity regions formed in the substrate and at both sides of each of the gate structures; conductive line structures provided to cross the gate structures and connected to the first impurity regions; and contact plugs connected to the second impurity regions, respectively. For each of the conductive line structures, the semiconductor device may include a first air spacer provided on a sidewall of the conductive line structure; a first material spacer provided between the conductive line structure and the first air spacer; and an insulating pattern provided on the air spacer. The insulating pattern may include a first portion and a second portion, and the second portion may have a depth greater than that of the first portion and defines a top surface of the air spacer.