公开(公告)号：US10181354B2

公开(公告)日：2019-01-15

申请号：US15690159

申请日：2017-08-29

Applicant: Silicon Storage Technology, Inc.

Inventor： Bin Sheng ,  Yao Zhou ,  Tao Wang ,  Xiaozhou Qian ,  Lu Guo ,  Ning Bai

IPC: G11C16/08 ,  G11C16/28 ,  G11C16/04

Abstract: The present invention relates to an improved sense amplifier for reading values in flash memory cells in an array. In one embodiment, a sense amplifier comprises an improved pre-charge circuit for pre-charging a bit line during a pre-charge period to increase the speed of read operations. In another embodiment, a sense amplifier comprises simplified address decoding circuitry to increase the speed of read operations.

公开(公告)号：US09378834B2

公开(公告)日：2016-06-28

申请号：US14486673

申请日：2014-09-15

Applicant: Silicon Storage Technology, Inc.

Inventor： Xiaozhou Qian ,  Yao Zhou ,  Bin Sheng ,  Jiaxu Peng ,  Yaohua Zhu

IPC: G11C16/06 ,  G11C16/24 ,  G11C29/02 ,  G11C29/28 ,  G11C16/28 ,  G11C29/12

CPC classification number: G11C16/24 ,  G11C5/145 ,  G11C5/147 ,  G11C7/04 ,  G11C7/1048 ,  G11C7/12 ,  G11C16/26 ,  G11C16/28 ,  G11C16/30 ,  G11C16/3418 ,  G11C29/021 ,  G11C29/028 ,  G11C29/28 ,  G11C2029/1204

Abstract: A bitline regulator for use in a high speed flash memory system is disclosed. The bitline regulator is responsive to a set of trim bits that are generated by comparing the bias voltage of a bitline to a reference voltage.

Abstract translation: 公开了一种用于高速闪存系统的位线调节器。 位线调节器响应于通过将位线的偏置电压与参考电压进行比较而产生的一组修整位。

公开(公告)号：US20160027519A1

公开(公告)日：2016-01-28

申请号：US14486673

申请日：2014-09-15

Applicant: Silicon Storage Technology, Inc.

Inventor： Xiaozhou Qian ,  Yao Zhou ,  Bin Sheng ,  Jiaxu Peng ,  Yaohua Zhu

IPC: G11C16/24

CPC classification number: G11C16/24 ,  G11C5/145 ,  G11C5/147 ,  G11C7/04 ,  G11C7/1048 ,  G11C7/12 ,  G11C16/26 ,  G11C16/28 ,  G11C16/30 ,  G11C16/3418 ,  G11C29/021 ,  G11C29/028 ,  G11C29/28 ,  G11C2029/1204

Abstract: A bitline regulator for use in a high speed flash memory system is disclosed. The bitline regulator is responsive to a set of trim bits that are generated by comparing the bias voltage of a bitline to a reference voltage.

Abstract translation: 公开了一种用于高速闪存系统的位线调节器。 位线调节器响应于通过将位线的偏置电压与参考电压进行比较而产生的一组修整位。

公开(公告)号：US20160019972A1

公开(公告)日：2016-01-21

申请号：US14772047

申请日：2013-03-15

Applicant: SILICON STORAGE TECHNOLOGY, INC.

Inventor： Yao Zhou ,  Kai Man Yue ,  Xiaozhou Qian ,  Bin Sheng

IPC: G11C16/28 ,  G11C16/32 ,  G11C16/24

CPC classification number: G11C16/28 ,  G11C7/08 ,  G11C7/227 ,  G11C8/18 ,  G11C16/24 ,  G11C16/26 ,  G11C16/32

Abstract: A self-timer for a sense amplifier in a memory device is disclosed.

Abstract translation: 公开了一种用于存储器件中的读出放大器的自拍。

公开(公告)号：US20180075914A1

公开(公告)日：2018-03-15

申请号：US15690159

申请日：2017-08-29

Applicant: Silicon Storage Technology, Inc.

Inventor： Bin Sheng ,  Yao Zhou ,  Tao Wang ,  Xiaozhou Qian ,  Lu Guo ,  Ning Bai

IPC: G11C16/28

CPC classification number: G11C16/28 ,  G11C16/0425 ,  G11C16/08

Abstract: The present invention relates to an improved sense amplifier for reading values in flash memory cells in an array. In one embodiment, a sense amplifier comprises an improved pre-charge circuit for pre-charging a bit line during a pre-charge period to increase the speed of read operations. In another embodiment, a sense amplifier comprises simplified address decoding circuitry to increase the speed of read operations.

公开(公告)号：US09620235B2

公开(公告)日：2017-04-11

申请号：US14772047

申请日：2013-03-15

Applicant: Silicon Storage Technology, Inc.

Inventor： Yao Zhou ,  Kai Man Yue ,  Xiaozhou Qian ,  Bin Sheng

IPC: G11C16/06 ,  G11C16/28 ,  G11C7/08 ,  G11C8/18 ,  G11C16/26 ,  G11C16/24 ,  G11C16/32 ,  G11C7/22

CPC classification number: G11C16/28 ,  G11C7/08 ,  G11C7/227 ,  G11C8/18 ,  G11C16/24 ,  G11C16/26 ,  G11C16/32

Abstract: A self-timer for a sense amplifier in a memory device is disclosed.