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公开(公告)号：US12085601B2
公开(公告)日：2024-09-10
申请号：US17568278
申请日：2022-01-04
发明人： Romeo Letor , Veronica Puntorieri
IPC分类号： G01R31/26 , G01R19/165 , G01R19/32 , G01R31/28
CPC分类号： G01R31/2642 , G01R19/16528 , G01R19/32 , G01R31/2831 , G01R31/2884 , G01R31/2886 , H01L2924/00 , H01L2924/0002 , H01L2924/14
摘要： A system to monitor a MOSFET, the system including a switching arrangement configured to switchably isolate a gate terminal of the MOSFET and a source terminal of the MOSFET from a gate-control voltage source and a test circuit configured to detect a change in a gate-to-source voltage of the MOSFET over a test period, the test period occurring while the gate terminal and the source terminal are isolated.
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公开(公告)号：US20210218223A1
公开(公告)日：2021-07-15
申请号：US17123712
申请日：2020-12-16
发明人： Romeo Letor , Antoine Pavlin , Alfio Russo , Nadia Lecci
IPC分类号： H01S5/042 , G01S7/484 , H03K17/687
摘要： An embodiment pulse generator circuit is configured to apply a current pulse to two output terminals. The pulse generator circuit comprises an LC resonant circuit comprising an inductance and a capacitance connected in series between a first node and a negative input terminal. The pulse generator circuit comprises a charge circuit configured to charge the capacitance via a supply voltage, a first electronic switch configured to selectively short-circuit the two output terminals, a second electronic switch configured to selectively connect the two output terminals in parallel with the LC resonant circuit, and a control circuit configured to drive the first and the second electronic switch.
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公开(公告)号：US11894657B2
公开(公告)日：2024-02-06
申请号：US17360381
申请日：2021-06-28
发明人： Romeo Letor , Vanni Poletto , Antoine Pavlin , Nadia Lecci , Alfio Russo
CPC分类号： H01S5/06216 , H01S5/0261 , H03K5/07
摘要： An embodiment pulse generator circuit comprises a first electronic switch coupled between first and second nodes, and a second electronic switch coupled between the second node and a reference node. An LC resonant circuit comprising an inductance and a capacitance is coupled between the first and reference nodes along with charge circuitry comprises a further inductance in a current flow line between a supply node and an intermediate node in the LC resonant circuit. Drive circuitry of the electronic switches repeats, during a sequence of switching cycles, charge time intervals, wherein the capacitance in the LC resonant circuit is charged via the charge circuit, and pulse generation time intervals, wherein a pulsed current is provided to the load via the first and second nodes. The charge and pulse generation time intervals are interleaved with oscillation time intervals where the LC resonant circuit oscillates at a resonance frequency.
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公开(公告)号：US11846654B2
公开(公告)日：2023-12-19
申请号：US17209662
申请日：2021-03-23
发明人： Romeo Letor
CPC分类号： G01R31/58 , G01R19/003 , G01R19/17 , H02H1/0007 , H02H9/025
摘要： Described herein is a method including measuring a current in a wire, normalizing the measured current, and comparing the normalized measured current to a control curve. The control curve is a function of a series of normalized current magnitudes and reaction times for corresponding ones of that series of normalized current magnitudes. The method further includes limiting the current in the wire based upon the comparison. The reaction times for ones of the series of normalized current magnitudes are times at which current limitation would occur if the normalized current remained at an associated normalized current magnitude.
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公开(公告)号：US20230213574A1
公开(公告)日：2023-07-06
申请号：US17568278
申请日：2022-01-04
发明人： Romeo Letor , Veronica Puntorieri
IPC分类号： G01R31/26 , G01R19/32 , G01R19/165
CPC分类号： G01R31/2642 , G01R19/32 , G01R19/16528
摘要： A system to monitor a MOSFET, the system including a switching arrangement configured to switchably isolate a gate terminal of the MOSFET and a source terminal of the MOSFET from a gate-control voltage source and a test circuit configured to detect a change in a gate-to-source voltage of the MOSFET over a test period, the test period occurring while the gate terminal and the source terminal are isolated
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公开(公告)号：US20220014187A1
公开(公告)日：2022-01-13
申请号：US17338157
申请日：2021-06-03
发明人： Romeo Letor , Vanni Poletto , Antoine Pavlin , Alfio Russo , Nadia Lecci
IPC分类号： H03K17/687 , H01S5/042
摘要： In accordance with an embodiment, a pulse generator circuit includes: an LC resonant circuit coupled between a first node and a reference node; a first switch coupled between the first node and the reference node; a switching network comprising a second switch coupled between the first node and a respective drive node; and drive circuit having outputs coupled to the first switch and to the second switch of the switching network. The drive circuit configured to, in repeating cycles: close the first switch when a current flowing through an inductor of the LC resonant circuit increases during a resonant cycle, when the current flowing through the inductor reaches a threshold value, open the first switch, close the second switch of the switching network for a pulse duration time when the first switch is open, and open the second switch at an expiration of the pulse duration time.
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公开(公告)号：US11133667B2
公开(公告)日：2021-09-28
申请号：US16790888
申请日：2020-02-14
发明人： Romeo Letor
摘要： A protection circuit for an automotive wiring harness includes an input node receiving a sensing signal indicating intensity of current in a conductor, an output node emitting a current control output signal to reduce the current and/or emitting a warning signal indicating the current intensity having reached a limit value. Signal processing circuitry coupled to the input node compares the current intensity with a reference value, and produces a comparison signal indicating whether the current intensity exceeds the reference value. A counting circuitry driven by the comparison signal counts in a first count direction as a result of the comparison signal indicating that the current intensity exceeds the reference value. Latching circuitry coupled to the counter circuitry generates the output signal at the output node as a result of the count value of the counter circuitry reaching a limit value.
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