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公开(公告)号：US09312285B2
公开(公告)日：2016-04-12
申请号：US14480751
申请日：2014-09-09
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Young-Wook Lee , Jang-Soo Kim
IPC: G02F1/1343 , H01L27/12 , G02F1/1365 , G02F1/1362
CPC classification number: H01L27/124 , G02F1/136209 , G02F1/136286 , G02F1/1365 , G02F1/1368 , G02F2001/134372 , G02F2001/136222 , G02F2001/13629 , H01L27/1248
Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film. transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.
Abstract translation: 薄膜晶体管阵列面板包括基板; 形成在所述基板上的多条栅极线; 与栅极线相交的多条数据线; 连接到栅极线和数据线的多个薄膜晶体管; 形成在栅极线，数据线和薄膜的上部的多个滤色器。 晶体管 形成在滤色器上并且包括透明导体的公共电极; 钝化层，其形成在所述公共电极的上部; 以及形成在钝化层的上部并且连接到每个薄膜晶体管的漏电极的多个像素电极。
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公开(公告)号：US08836878B2
公开(公告)日：2014-09-16
申请号：US13951543
申请日：2013-07-26
Applicant: Samsung Display Co., Ltd.
Inventor： Young-Wook Lee , Jang-Soo Kim
IPC: G02F1/136 , G02F1/1362 , H01L27/12
CPC classification number: H01L27/124 , G02F1/136209 , G02F1/136286 , G02F1/1365 , G02F1/1368 , G02F2001/134372 , G02F2001/136222 , G02F2001/13629 , H01L27/1248
Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.
Abstract translation: 薄膜晶体管阵列面板包括基板; 形成在所述基板上的多条栅极线; 与栅极线相交的多条数据线; 连接到栅极线和数据线的多个薄膜晶体管; 形成在栅极线，数据线和薄膜晶体管的上部的多个滤色器; 形成在滤色器上并且包括透明导体的公共电极; 钝化层，其形成在所述公共电极的上部; 以及形成在钝化层的上部并且连接到每个薄膜晶体管的漏电极的多个像素电极。
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公开(公告)号：US09275593B2
公开(公告)日：2016-03-01
申请号：US14459140
申请日：2014-08-13
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Kwi-Hyun Kim , Jang-Soo Kim , Hyeong-Jun Jin , Soo-Chul Kim , Kyoung-Hae Min
CPC classification number: G09G3/3677 , G09G2300/0408 , G09G2300/0417 , G09G2300/0426 , G09G2310/0286 , G09G2330/04 , G11C19/28
Abstract: In one embodiment, a display panel includes a substrate and a gate driver disposed on the substrate. The gate driver comprises a wiring unit which receives signals and a circuit unit which outputs driving signals in response to the signals received from the wiring unit. The circuit unit comprises a shift register and a shift register wiring connected to the shift register. The wiring unit comprises first through n-th signal lines (n is a natural number greater than two) arranged sequentially adjacent to the shift register. The first line is located farthest from the shift register and the n-th signal line is closest from the shift register. Further, the first signal line is electrically connected to the shift register by a first connection line that comprises a first contact portion connected to the first signal line and a second contact portion connected to the shift resistor wiring.
Abstract translation: 在一个实施例中，显示面板包括设置在基板上的基板和栅极驱动器。 栅极驱动器包括接收信号的布线单元和响应于从布线单元接收的信号而输出驱动信号的电路单元。 电路单元包括移位寄存器和连接到移位寄存器的移位寄存器布线。 布线单元包括顺序地与移位寄存器相邻布置的第一至第n信号线（n是大于2的自然数）。 第一行位于离移位寄存器最远的位置，第n条信号线最靠近移位寄存器。 此外，第一信号线通过包括连接到第一信号线的第一接触部分和连接到换档电阻器接线的第二接触部分的第一连接线电连接到移位寄存器。
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公开(公告)号：US09269729B2
公开(公告)日：2016-02-23
申请号：US14727286
申请日：2015-06-01
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Kwang-Ho Lee , Jang-Soo Kim , Hong-Suk Yoo , Sang-Soo Kim , Shi-Yul Kim , Jae-Hyoung Youn
IPC: H01L27/12 , G02F1/1362 , G02F1/1339
CPC classification number: H01L27/124 , G02F1/13394 , G02F1/136209 , G02F1/136227 , G02F2001/136222 , H01L27/1248 , H01L27/1262
Abstract: A thin film transistor (“TFT”) array panel includes; an insulation substrate, a TFT disposed on the insulation substrate and including a drain electrode, a passivation layer covering the TFT and including a contact portion disposed therein corresponding to the drain electrode, a partition comprising an organic material disposed on the passivation layer, and including a transverse portion, a longitudinal portion, and a contact portion disposed on the drain electrode, a color filter disposed on the passivation layer and disposed in a region defined by the partition, an organic capping layer disposed on the partition and the color filter, and a pixel electrode disposed on the organic capping layer, and connected to the drain electrode through the contact portion of the passivation layer and the contact portion of the partition, wherein a contact hole is formed in the organic capping layer corresponding to the contact portion of the passivation layer.
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公开(公告)号：US09978780B2
公开(公告)日：2018-05-22
申请号：US15095646
申请日：2016-04-11
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Young-Wook Lee , Jang-Soo Kim
IPC: G02F1/1343 , H01L27/12 , G02F1/1365 , G02F1/1368 , G02F1/1362
CPC classification number: H01L27/124 , G02F1/136209 , G02F1/136286 , G02F1/1365 , G02F1/1368 , G02F2001/134372 , G02F2001/136222 , G02F2001/13629 , H01L27/1248
Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.
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Patent Agency Ranking
公开(公告)号：US08975145B2
公开(公告)日：2015-03-10
申请号：US14168971
申请日：2014-01-30
Applicant: Samsung Display Co., Ltd.
Inventor： Yu-Gwang Jeong , Young-Wook Lee , Sang-Gab Kim , Woo-Geun Lee , Min-Seok Oh , Jang-Soo Kim , Kap-Soo Yoon , Shin-Il Choi , Hong-Kee Chin , Seung-Ha Choi , Seung-Hwan Shim , Sung-Hoon Yang , Ki-Hun Jeong
CPC classification number: H01L27/127 , H01L27/1214 , H01L27/1259 , H01L27/1288 , H01L29/66765
Abstract: Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved.
Abstract translation: 本发明的实施例涉及薄膜晶体管和显示面板的制造方法，包括在基板上形成包括栅电极的栅极线，在栅电极上形成栅绝缘层，在栅电极上形成本征半导体 栅极绝缘层，在本征半导体上形成非本征半导体，在外部半导体上形成包括源电极和漏电极的数据线，以及对源电极和漏极之间的非本征半导体的一部分进行等离子体处理，以形成 保护构件和保护构件的相应侧上的欧姆接触。 因此，可以省略用于蚀刻外部半导体和形成用于保护本征半导体的无机绝缘层的工艺，从而可以简化显示面板的制造工艺，可以降低制造成本，并且可以提高生产率。
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公开(公告)号：US09570477B2
公开(公告)日：2017-02-14
申请号：US15041746
申请日：2016-02-11
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Kwang-Ho Lee , Jang-Soo Kim , Hong-Suk Yoo , Sang-Soo Kim , Shi-Yul Kim , Jae-Hyoung Youn
IPC: H01L33/00 , H01L21/28 , H01L27/12 , G02F1/1362 , G02F1/1339
CPC classification number: H01L27/124 , G02F1/13394 , G02F1/136209 , G02F1/136227 , G02F2001/136222 , H01L27/1248 , H01L27/1262
Abstract: A thin film transistor (“TFT”) array panel includes; an insulation substrate, a TFT disposed on the insulation substrate and including a drain electrode, a passivation layer covering the TFT and including a contact portion disposed therein corresponding to the drain electrode, a partition comprising an organic material disposed on the passivation layer, and including a transverse portion, a longitudinal portion, and a contact portion disposed on the drain electrode, a color filter disposed on the passivation layer and disposed in a region defined by the partition, an organic capping layer disposed on the partition and the color filter, and a pixel electrode disposed on the organic capping layer, and connected to the drain electrode through the contact portion of the passivation layer and the contact portion of the partition, wherein a contact hole is formed in the organic capping layer corresponding to the contact portion of the passivation layer.
Abstract translation: 薄膜晶体管（“TFT”）阵列面板包括： 绝缘基板，设置在所述绝缘基板上并包括漏电极的TFT，覆盖所述TFT的钝化层，并且包括设置在其中的所述漏电极对应的接触部分，所述隔板包括设置在所述钝化层上的有机材料，并且包括 横向部分，纵向部分和设置在漏电极上的接触部分，设置在钝化层上并设置在由隔板限定的区域中的滤色器，设置在隔板上的有机覆盖层和滤色器，以及 设置在所述有机覆盖层上的像素电极，并且通过所述钝化层的接触部分和所述隔离物的接触部分连接到所述漏电极，其中在所述有机覆盖层中形成接触孔，所述接触孔对应于所述钝化层的接触部分 钝化层。
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公开(公告)号：US08879031B2
公开(公告)日：2014-11-04
申请号：US14046396
申请日：2013-10-04
Applicant: Samsung Display Co, Ltd.
Inventor： Kyung-Sook Jeon , Jang-Soo Kim , Hong-Suk Yoo , Yong-Hwan Kim , Hwa-Yeul Oh , Jong-In Kim , Sang-Hee Jang
IPC: G02F1/1333 , G02F1/1339 , G02F1/1335
CPC classification number: G02F1/133514 , G02F1/133516 , G02F1/13394 , G02F2001/133388
Abstract: Exemplary embodiments of the present invention disclose a liquid crystal display (LCD) and a method of manufacturing the same. The LCD may have a display area and a peripheral area. An organic layer of the peripheral area may be patterned using a half-tone mask, and a protrusion member may be formed in the peripheral area. Accordingly, the thin film transistor array panel and the corresponding substrate may be prevented from being temporary adhered in the peripheral area such that the density of the liquid crystal molecules filled in the peripheral area may be uniformly maintained and the display quality of the liquid crystal display may be improved.
Abstract translation: 本发明的示例性实施例公开了液晶显示器（LCD）及其制造方法。 LCD可以具有显示区域和外围区域。 可以使用半色调掩模对周边区域的有机层进行图案化，并且可以在周边区域中形成突起构件。 因此，可以防止薄膜晶体管阵列面板和对应的基板临时粘附在周边区域中，使得可以均匀地保持填充在周边区域中的液晶分子的密度，并且液晶显示器的显示质量 可以改进。
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公开(公告)号：US11462571B2
公开(公告)日：2022-10-04
申请号：US17086595
申请日：2020-11-02
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Young-Wook Lee , Jang-Soo Kim
IPC: G02F1/1362 , H01L27/12 , G02F1/1365 , G02F1/1368 , G02F1/1343
Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.
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公开(公告)号：US10825841B2
公开(公告)日：2020-11-03
申请号：US15981090
申请日：2018-05-16
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Young-Wook Lee , Jang-Soo Kim
IPC: G02F1/1362 , H01L27/12 , G02F1/1365 , G02F1/1368 , G02F1/1343
Abstract: A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.
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