公开(公告)号：US20240413248A1

公开(公告)日：2024-12-12

申请号：US18808905

申请日：2024-08-19

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su LEE ,  Yoon Ho KHANG ,  Dong Jo KIM ,  Hyun Jae NA ,  Sang Ho PARK ,  Se Hwan YU ,  Chong Sup CHANG ,  Dae Ho KIM ,  Jae Neung KIM ,  Myoung Geun CHA ,  Sang Gab KIM ,  Yu-Gwang JEONG

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/417 ,  H01L29/66 ,  H10K59/121

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US20230215954A1

公开(公告)日：2023-07-06

申请号：US18176454

申请日：2023-02-28

Applicant: SAMSUNG DISPLAY CO., LTD

Inventor： YONG SU LEE ,  Yoon Ho KHANG ,  Dong Jo KIM ,  Hyun Jae NA ,  Sang Ho PARK ,  Se Hwan YU ,  Chong Sup CHANG ,  Dae Ho KIM ,  Jae Neung Kim ,  Myoung Geun CHA ,  Sang Gab KIM ,  Yu-Gwang JEONG

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/66 ,  H01L29/417

CPC classification number: H01L29/78633 ,  H01L29/78618 ,  H01L27/1288 ,  H01L27/124 ,  H01L29/7869 ,  H01L27/1225 ,  H01L29/78696 ,  H01L29/66969 ,  H01L29/41733 ,  H10K59/1213

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

公开(公告)号：US20170154897A1

公开(公告)日：2017-06-01

申请号：US15427696

申请日：2017-02-08

Applicant: Samsung Display Co., Ltd.

Inventor： Do-Hyun KIM ,  Yoon Ho KHANG ,  Dong-Hoon LEE ,  Sang Ho PARK ,  Se Hwan YU ,  Cheol Kyu KIM ,  Yong-Su LEE ,  Sung Haeng CHO ,  Chong Sup CHANG ,  Dong Jo KIM ,  Jung Kyu LEE

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/124 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/45 ,  H01L29/7869

Abstract: A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

公开(公告)号：US20150194534A1

公开(公告)日：2015-07-09

申请号：US14666461

申请日：2015-03-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yong Su LEE ,  Yoon Ho KHANG ,  Dong Jo KIM ,  Hyun Jae NA ,  Sang Ho PARK ,  Se Hwan YU ,  Chong Sup CHANG ,  Dae Ho KIM ,  Jae Neung KIM ,  Myoung Geun CHA ,  Sang Gab KIM ,  Yu-Gwang JEONG

IPC: H01L29/786 ,  H01L29/417

CPC classification number: H01L29/78633 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1288 ,  H01L27/3262 ,  H01L29/41733 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78696

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract translation: 根据本发明的示例性实施例的薄膜晶体管包括氧化物半导体。 源电极和漏电极彼此面对。 源电极和漏电极分别位于氧化物半导体的两个相对侧。 低导电区域位于源电极或漏电极与氧化物半导体之间。 绝缘层位于氧化物半导体和低导电区域上。 栅电极位于绝缘层上。 绝缘层覆盖氧化物半导体和低导电区域。 低导电区域的载流子浓度低于源电极或漏电极的载流子浓度。

公开(公告)号：US20160148958A1

公开(公告)日：2016-05-26

申请号：US15010497

申请日：2016-01-29

Applicant: Samsung Display Co., Ltd.

Inventor： Do-Hyun KIM ,  Yoon Ho KHANG ,  Dong-Hoon LEE ,  Sang Ho PARK ,  Se Hwan YU ,  Cheol Kyu KIM ,  Yong-Su LEE ,  Sung Haeng CHO ,  Chong Sup CHANG ,  Dong Jo KIM ,  Jung Kyu LEE

IPC: H01L27/12

CPC classification number: H01L27/124 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/45 ,  H01L29/7869

Abstract: A thin film transistor array panel includes: a gate wiring layer disposed on a substrate; an oxide semiconductor layer disposed on the gate wiring layer; and a data wiring layer disposed on the oxide semiconductor layer, in which the data wiring layer includes a main wiring layer including copper and a capping layer disposed on the main wiring layer and including a copper alloy.

Abstract translation: 薄膜晶体管阵列面板包括：设置在基板上的栅极布线层; 设置在所述栅极布线层上的氧化物半导体层; 以及数据布线层，其设置在所述氧化物半导体层上，所述数据布线层包括包含铜的主布线层和设置在所述主布线层上并包括铜合金的覆盖层。

公开(公告)号：US20150109563A1

公开(公告)日：2015-04-23

申请号：US14578703

申请日：2014-12-22

Applicant: Samsung Display Co., Ltd.

Inventor： Hyang-Shik KONG ,  Sung Hoon YANG ,  Se Hwan YU ,  Yong Hwan SHIN ,  Su Mi LEE ,  Shin Il CHOI

IPC: G02F1/1343 ,  G02F1/1335

CPC classification number: G02F1/13439 ,  G02F1/133528 ,  G02F2001/133548 ,  G02F2001/133565

Abstract: A manufacturing method of a liquid crystal display includes: forming an etch target layer including a conductive material on a first substrate; forming a first mask layer on the etch target layer; forming a block copolymer coating layer including a plurality of polymers on the first mask layer; processing the block copolymer coating layer to form a block copolymer pattern layer including first and second polymer blocks; removing one of the first or second polymer blocks to form a second mask pattern layer; etching the first mask layer by using the second mask pattern layer as an etching mask to form a first mask pattern layer; and etching the etch target layer by using the first mask pattern layer as an etching mask to form a first electrode. The first electrode includes a plurality of the first minute patterns extending in a predetermined direction and having a polarization function.

Abstract translation: 液晶显示器的制造方法包括：在第一基板上形成包括导电材料的蚀刻目标层; 在所述蚀刻目标层上形成第一掩模层; 在所述第一掩模层上形成包含多个聚合物的嵌段共聚物涂层; 处理嵌段共聚物涂层以形成包含第一和第二聚合物嵌段的嵌段共聚物图案层; 去除所述第一或第二聚合物嵌段之一以形成第二掩模图案层; 通过使用第二掩模图案层作为蚀刻掩模蚀刻第一掩模层以形成第一掩模图案层; 以及通过使用第一掩模图案层作为蚀刻掩模蚀刻蚀刻目标层以形成第一电极。 第一电极包括沿预定方向延伸并且具有偏振功能的多个第一微小图案。

公开(公告)号：US20140138772A1

公开(公告)日：2014-05-22

申请号：US13892574

申请日：2013-05-13

Applicant: Samsung Display Co., Ltd

Inventor： Hyun Jae NA ,  Yoon Ho KHANG ,  Sang Ho PARK ,  Dong Hwan SHIM ,  Se Hwan YU ,  Yong Su LEE ,  Myoung Geun CHA

IPC: H01L27/12

CPC classification number: H01L29/4908 ,  H01L29/518 ,  H01L29/78603 ,  H01L29/78633

Abstract: A thin film transistor display panel according to an exemplary embodiment of the present invention includes a substrate, a first insulating layer formed on the substrate, a semiconductor layer formed on the first insulating layer, a second insulating layer formed on the semiconductor layer, and a gate electrode formed on the second insulating layer, in which the first insulating layer includes a light blocking material, and a thickness of the first insulating layer is greater than or equal to a thickness of the second insulating layer.

Abstract translation: 根据本发明的示例性实施例的薄膜晶体管显示面板包括基板，形成在基板上的第一绝缘层，形成在第一绝缘层上的半导体层，形成在半导体层上的第二绝缘层，以及 形成在第二绝缘层上的栅电极，其中第一绝缘层包括遮光材料，第一绝缘层的厚度大于或等于第二绝缘层的厚度。