公开(公告)号：US20250048639A1

公开(公告)日：2025-02-06

申请号：US18653301

申请日：2024-05-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hakseon Kim ,  Kangoh Yun ,  Dongjin Lee ,  Youngrok Kim ,  Ryoongbin Lee ,  Jaeduk Lee

IPC: H10B43/40 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27

Abstract: A non-volatile memory device includes a peripheral circuit and a memory cell array that are sequentially stacked. The peripheral circuit includes, a device isolation layer defining an active region within a substrate, a first gate electrode extending in a first horizontal direction on the active region, an insulating pattern in a first recess and a second recess spaced apart in a second horizontal direction within the active region on opposing sides of the first gate electrode, a first low concentration doped region along an outer wall of the first recess, a second low concentration doped region along an outer wall of the second recess, a first source/drain region buried in the first low concentration doped region, and a second source/drain region buried in the second low concentration doped region.

公开(公告)号：US12238931B2

公开(公告)日：2025-02-25

申请号：US17387868

申请日：2021-07-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae Hwa Seo ,  Hakseon Kim ,  Sungkweon Baek

IPC: H10B43/40 ,  H10B41/27 ,  H10B41/41 ,  H10B43/27

Abstract: A semiconductor device and an electronic system including the same are disclosed. The semiconductor device may include a gate electrode on a semiconductor substrate, a gate insulating layer between the gate electrode and the semiconductor substrate, a first epitaxial layer disposed on the semiconductor substrate and at a side of the gate electrode, a second epitaxial layer disposed on the semiconductor substrate and at an opposite side of the gate electrode, a first contact plug in contact with a portion of the first epitaxial layer, and a second contact plug in contact with a portion of the second epitaxial layer. Top surfaces of the first and second epitaxial layers may be located at a level higher than a top surface of the gate electrode.

公开(公告)号：US11575009B2

公开(公告)日：2023-02-07

申请号：US16822389

申请日：2020-03-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungkweon Baek ,  Taeyoung Kim ,  Hakseon Kim ,  Kangoh Yun ,  Changhoon Jeon ,  Junhee Lim

IPC: H01L29/10 ,  H01L29/08 ,  H01L29/66 ,  H01L29/06 ,  H01L29/423 ,  H01L29/78

Abstract: A semiconductor device includes a gate structure disposed on a substrate. The gate structure has a first sidewall and a second sidewall facing the first sidewall. A first impurity region is disposed within an upper portion of the substrate. The first impurity region is spaced apart from the first sidewall. A third impurity region is within the upper portion of the substrate. The third impurity region is spaced apart from the second sidewall. A first trench is disposed within the substrate between the first sidewall and the first impurity region. The first trench is spaced apart from the first sidewall. A first barrier insulation pattern is disposed within the first trench.

公开(公告)号：US12010846B2

公开(公告)日：2024-06-11

申请号：US17476711

申请日：2021-09-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungkweon Baek ,  Hakseon Kim ,  Jaehwa Seo

IPC: H10B43/27 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

CPC classification number: H10B43/27 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

Abstract: A transistor of a semiconductor device includes an isolation region, an active region disposed in the isolation region, a gate extending in a second direction on the active region, and source and drain regions respectively extending in a first direction perpendicular to the second direction in the active region on first and second sides of the gate. The source and drain regions include low-concentration source and drain doping regions including first and second low-concentration source and drain doping regions The source and drain regions further include high-concentration source and drain doping regions respectively disposed in the low-concentration source and drain doping regions and having higher doping concentrations than the low-concentration source and drain doping regions. A first length in the second direction of the first low-concentration source and drain doping regions is greater than a second length in the second direction of the second low-concentration source and drain doping regions.

公开(公告)号：US20240324193A1

公开(公告)日：2024-09-26

申请号：US18515449

申请日：2023-11-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MinKyung KIM ,  Hakseon Kim ,  Sunggil Kim ,  Jumi Bak ,  Kang-Oh Yun ,  Dongjin Lee ,  Sohyun Lee ,  Junhee Lim

IPC: H10B41/35 ,  H01L23/528 ,  H01L25/065 ,  H10B41/10 ,  H10B41/27 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B80/00

CPC classification number: H10B41/35 ,  H01L23/5283 ,  H01L25/0652 ,  H10B41/10 ,  H10B41/27 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H10B80/00 ,  H01L2225/06524

Abstract: A semiconductor device includes a substrate, a doped region on the substrate, the doped region including impurities of a first conductivity type at a first concentration, a gate structure on the substrate, and a first contact electrically connected to the doped region, the first contact including a first portion, a second portion on the first portion, and a third portion on the second portion, the first portion and the second portion including poly silicon, the third portion including at least one metallic material, and the second portion including impurities of the first conductivity type at a second concentration higher than the first concentration.

公开(公告)号：US20220208787A1

公开(公告)日：2022-06-30

申请号：US17476711

申请日：2021-09-16

Applicant: Samsung Electronics Co., LTD

Inventor： SUNGKWEON BAEK ,  Hakseon Kim ,  Jaehwa Seo

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11573

Abstract: A transistor of a semiconductor device includes an isolation region, an active region disposed in the isolation region, a gate extending in a second direction on the active region, and source and drain regions respectively extending in a first direction perpendicular to the second direction in the active region on first and second sides of the gate. The source and drain regions include low-concentration source and drain doping regions including first and second low-concentration source and drain doping regions The source and drain regions further include high-concentration source and drain doping regions respectively disposed in the low-concentration source and drain doping regions and having higher doping concentrations than the low-concentration source and drain doping regions. A first length in the second direction of the first low-concentration source and drain doping regions is greater than a second length in the second direction of the second low-concentration source and drain doping regions.