公开(公告)号：US20140241085A1

公开(公告)日：2014-08-28

申请号：US14076401

申请日：2013-11-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Je-Min RYU ,  Sung-Min SEO ,  Yong-Ho CHO ,  Nak-Won HEO

IPC: G11C29/04

CPC classification number: G11C29/04 ,  G11C17/16 ,  G11C2029/4402

Abstract: A semiconductor memory device for performing a disable operation using an anti-fuse, and method thereof are provided. The semiconductor memory device according to an example embodiment includes a fuse circuit including at least one anti-fuse configured to store fuse data, a memory circuit configured to at least one of read data stored in a memory cell and write data to the memory cell and a fuse controller configured to disable a read/write operation of the memory circuit based on the fuse data.

Abstract translation: 提供了一种使用反熔丝执行禁止操作的半导体存储器件及其方法。 根据示例实施例的半导体存储器件包括：熔丝电路，其包括被配置为存储熔丝数据的至少一个反熔丝;存储器电路，被配置为存储在存储单元中的读取数据中的至少一个，并将数据写入存储器单元; 熔丝控制器，被配置为基于所述熔丝数据来禁止所述存储器电路的读/写操作。

公开(公告)号：US20140219038A1

公开(公告)日：2014-08-07

申请号：US14073987

申请日：2013-11-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Je-Min RYU ,  Sung-Min SEO ,  Ju-Seop PARK

IPC: G11C7/22

CPC classification number: G11C7/20 ,  G11C7/1063 ,  G11C7/22 ,  G11C7/222 ,  G11C29/028 ,  G11C2029/4402

Abstract: A data read start decision device includes: a storing circuit configured to store code key data; a read check circuit configured to output a read start signal in response to code key data read from the storing circuit, and a controller configured to start reading environment setting data from the storing circuit in response to the read start signal. The read check circuit is configured to at least one of: receive the read start signal from the controller and transfer the read start signal to the controller in response to the read code key data; and generate the read start signal based on the read code key data and output the read start signal to the controller.

Abstract translation: 数据读取开始判定装置包括：存储电路，被配置为存储代码密钥数据; 读取检查电路，被配置为响应于从存储电路读取的代码密钥数据输出读取开始信号，以及控制器，被配置为响应于读取的开始信号从存储电路开始读取环境设置数据。 读取检查电路被配置为以下中的至少一个：从控制器接收读取开始信号并响应于读取代码密钥数据将读取的开始信号传送到控制器; 并根据读取的代码键数据生成读取开始信号，并将读出的开始信号输出到控制器。

公开(公告)号：US20160189800A1

公开(公告)日：2016-06-30

申请号：US14970983

申请日：2015-12-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Je-Min RYU ,  Ho-Young SONG ,  Yun-Young LEE

IPC: G11C29/00 ,  G11C8/10 ,  G11C17/16

CPC classification number: G11C29/40 ,  G06F11/006 ,  G11C8/10 ,  G11C17/00 ,  G11C17/143 ,  G11C17/16 ,  G11C17/18 ,  G11C29/04 ,  G11C29/76

Abstract: Provided is a semiconductor device and a manufacturing method thereof. The semiconductor device may include a first cell array, a first fuse circuit, a first spare cell array, a second spare cell array, and a redundancy select controller. The first fuse circuit may be configured to store a first failed address corresponding to one or more defective memory cells in the first cell array. Each of the first and second spare cell arrays may include a plurality of spare memory cells configured to replace first and second defective memory cells in the first cell array, respectively. For replacing the first and second defective memory cells, the redundancy select controller may be configured to selectively assign the first fuse circuit to either one or both of the first and second spare cell arrays.

Abstract translation: 提供一种半导体器件及其制造方法。 半导体器件可以包括第一单元阵列，第一熔丝电路，第一备用单元阵列，第二备用单元阵列和冗余选择控制器。 第一熔丝电路可以被配置为存储对应于第一单元阵列中的一个或多个有缺陷的存储器单元的第一失败地址。 第一和第二备用单元阵列中的每一个可以包括分别替换第一单元阵列中的第一和第二有缺陷存储单元的多个备用存储单元。 为了替换第一和第二有缺陷的存储器单元，冗余选择控制器可以被配置为选择性地将第一熔丝电路分配给第一和第二备用单元阵列中的一个或两个。

公开(公告)号：US20150325316A1

公开(公告)日：2015-11-12

申请号：US14595500

申请日：2015-01-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyu-Chang KANG ,  Gil-Su KIM ,  Je-Min RYU ,  Yun-Young LEE ,  Kyo-Min SOHN

IPC: G11C29/00 ,  G11C17/18 ,  G11C17/16

CPC classification number: G11C29/76 ,  G11C17/16 ,  G11C17/18 ,  G11C29/027 ,  G11C29/78 ,  G11C2029/4402

Abstract: A repair circuit includes first and second fuse circuits, a determination circuit and an output circuit. The first fuse circuit includes a first fuse and is configured to generate a first master signal indicating whether the first fuse has been programmed. The second fuse circuit includes second fuses and is configured to generate a first address indicating whether each of the second fuses has been programmed. The determination circuit is configured to generate a detection signal based on the first master signal and the first address. The detection signal indicates whether a negative program operation has been performed on the second fuse circuit. The output circuit is configured to generate a second master signal based on the first master signal and the detection signal and generate a repair address corresponding to a defective input address based on the first address and the detection signal.

Abstract translation: 修复电路包括第一和第二熔丝电路，确定电路和输出电路。 第一熔丝电路包括第一熔丝，并且被配置为产生指示第一熔丝是否已被编程的第一主信号。 第二熔丝电路包括第二保险丝，并且被配置为产生指示每个第二保险丝是否被编程的第一地址。 确定电路被配置为基于第一主信号和第一地址产生检测信号。 检测信号指示是否对第二熔丝电路执行了负编程操作。 输出电路被配置为基于第一主信号和检测信号产生第二主信号，并且基于第一地址和检测信号产生对应于有缺陷的输入地址的修复地址。