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公开(公告)号:US12120883B2
公开(公告)日:2024-10-15
申请号:US17666448
申请日:2022-02-07
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang-Yong Park , Jin-Hong Park , Sungjoo Lee
CPC classification number: H10B51/20 , H01L29/516 , H01L29/78391 , H10B51/30
Abstract: A semiconductor memory device capable of improving performance by the use of a charge storage layer including a ferroelectric material is provided. The semiconductor memory device includes a substrate, a tunnel insulating layer contacting the substrate, on the substrate, a charge storage layer contacting the tunnel insulating layer and including a ferroelectric material, on the tunnel insulating layer, a barrier insulating layer contacting the charge storage layer, on the charge storage layer, and a gate electrode contacting the barrier insulating layer, on the barrier insulating layer.
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公开(公告)号:US11670714B2
公开(公告)日:2023-06-06
申请号:US17338400
申请日:2021-06-03
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kilsu Jung , Jin-Hong Park , Keun Heo , Sungjun Kim
CPC classification number: H01L29/78391 , H01L29/267 , H01L29/45 , H01L29/516 , H01L29/7606 , H10K10/466 , H10K10/472 , H10K10/84
Abstract: A negative differential resistance device includes a dielectric layer having a first surface and a second surface opposing the first surface, a first semiconductor layer that includes a first degenerated layer that is on the first surface of the dielectric layer and has a first polarity, a second semiconductor layer that includes a second degenerated layer that has a region that overlaps the first semiconductor layer and has a second polarity, a first electrode electrically connected to the first semiconductor layer, a second electrode electrically connected to the second semiconductor layer, and a third electrode on the second surface of the dielectric layer and which has a region overlapping at least one of the first semiconductor layer or the second semiconductor layer.
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公开(公告)号:US12206021B2
公开(公告)日:2025-01-21
申请号:US18307914
申请日:2023-04-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kilsu Jung , Jin-Hong Park , Keun Heo , Sungjun Kim
Abstract: A negative differential resistance device includes a dielectric layer having a first surface and a second surface opposing the first surface, a first semiconductor layer that includes a first degenerated layer that is on the first surface of the dielectric layer and has a first polarity, a second semiconductor layer that includes a second degenerated layer that has a region that overlaps the first semiconductor layer and has a second polarity, a first electrode electrically connected to the first semiconductor layer, a second electrode electrically connected to the second semiconductor layer, and a third electrode on the second surface of the dielectric layer and which has a region overlapping at least one of the first semiconductor layer or the second semiconductor layer.
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公开(公告)号:US12230651B2
公开(公告)日:2025-02-18
申请号:US17668566
申请日:2022-02-10
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sungjun Kim , Jin-Hong Park , Sunghun Lee , Keun Heo
IPC: H01L27/14 , H01L27/146
Abstract: A photodetector includes a gate electrode extending in a first direction, a ferroelectric layer on the gate electrode and maintaining a state of polarization formed by a gate voltage applied to the gate electrode, a light absorbing layer on the ferroelectric layer and extending in a second direction intersecting the gate electrode, the light absorbing layer including a two-dimensional (2D) material of a layered structure, a source electrode on the ferroelectric layer and connected to a first end of the light absorbing layer, and a drain electrode on the ferroelectric layer and connected to the a second end of the light absorbing layer.
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公开(公告)号:US20240088239A1
公开(公告)日:2024-03-14
申请号:US18199516
申请日:2023-05-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sang-Yong PARK , Jin-Hong Park , Ju-Hee Lee
IPC: H01L29/417 , H01L29/06 , H01L29/423 , H01L29/775 , H01L29/786
CPC classification number: H01L29/41733 , H01L29/0673 , H01L29/41775 , H01L29/42392 , H01L29/775 , H01L29/78696
Abstract: A semiconductor device includes a substrate. A first channel pattern is disposed on the substrate. The first channel pattern includes a first side and a second side opposite to each other in a first direction. A first gate electrode is disposed on the first side of the first channel pattern. A first source/drain electrode is disposed on the first side of the first channel pattern. A second source/drain electrode is disposed on the second side of the first channel pattern. The first gate electrode overlaps the second source/drain electrode in the first direction.
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公开(公告)号:US09632437B2
公开(公告)日:2017-04-25
申请号:US13942854
申请日:2013-07-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jin-Hong Park , Jeong-Ho Yeo , Joo-On Park , Chang-Min Park
IPC: G03F7/20
CPC classification number: G03F7/70916
Abstract: Provided are a lithography apparatus, a method for lithography and a stage system. The lithography apparatus includes a reticle stage having a reticle, at least one nozzle on at least one surface of the reticle stage and configured to allow shielding gas to flow to a surface of the reticle to form an air curtain, and a gas supply unit configured to supply the nozzle with the shielding gas.
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