公开(公告)号：US20240133683A1

公开(公告)日：2024-04-25

申请号：US18460929

申请日：2023-09-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Inho KWAK ,  Jinsun KIM ,  Moosong LEE ,  Seungyoon LEE ,  Jeongjin LEE ,  Chan HWANG ,  Dohyeon PARK ,  Yeeun HAN

IPC: G01B15/00

CPC classification number: G01B15/00

Abstract: In an overlay measurement method, an overlay mark having programmed overlay values is provided. The overlay mark is scanned with an electron beam to obtain a voltage contrast image. A defect function that changes according to the overlay value is obtained from voltage contrast image data. Self-cross correlation is performed on the defect function to determine an overlay.

公开(公告)号：US20230411393A1

公开(公告)日：2023-12-21

申请号：US18140789

申请日：2023-04-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Moosong LEE ,  Jinsun KIM ,  Inho KWAK ,  Dohyeon PARK ,  Yeeun HAN ,  Sang-Ho YUN ,  Seungyoon LEE ,  Nanhyung KIM

IPC: H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L21/8234 ,  H01L27/02

CPC classification number: H01L27/0924 ,  H01L29/66545 ,  H01L27/0207 ,  H01L21/823437 ,  H01L21/823475 ,  H01L29/7851

Abstract: A semiconductor device includes a substrate having a key region, a dummy active pattern on the key region, the dummy active pattern including a first impurity region and a second impurity region, a line structure provided on the first impurity region and extended in a first direction, a dummy gate electrode provided between the first and second impurity regions and extended in a second direction crossing the first direction, and a dummy contact disposed adjacent to a side of the line structure and connected to the second impurity region. The dummy contact includes a plurality of long contacts arranged in the second direction.

公开(公告)号：US20210116803A1

公开(公告)日：2021-04-22

申请号：US16886237

申请日：2020-05-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Woo-Yong JUNG ,  Jinsun KIM ,  Seungyoon LEE ,  Jeongjin LEE ,  Chan HWANG

IPC: G03F1/70 ,  G03F1/36 ,  H01L21/66 ,  H01L21/027 ,  G03F7/20

Abstract: An overlay correction method may include obtaining a first central line of a lower pattern on a substrate, forming a photoresist pattern on the lower pattern, obtaining an ADI overlay value corresponding to a first distance between a second central line of an upper flat surface of the lower pattern and a third central line of the photoresist pattern, obtaining an asymmetrical overlay value corresponding to a second distance between the first and second central lines, form an upper pattern using the photoresist pattern, obtaining an ACI overlay value corresponding to a third distance between the first central line and a fourth central line of the upper pattern, subtracting the ADI overlay value from the ACI overlay value to obtain a first overlay skew value, and adding the asymmetrical overlay value to the first overlay skew value to obtain a second overlay skew value.