公开(公告)号：US11804528B2

公开(公告)日：2023-10-31

申请号：US17325466

申请日：2021-05-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang Young Kim ,  Byung Chan Ryu ,  Da Un Jeon

IPC: H01L29/417 ,  H01L23/522 ,  H01L29/45 ,  H01L29/423 ,  H01L23/528 ,  H01L23/532 ,  H01L29/786

CPC classification number: H01L29/41791 ,  H01L23/5226 ,  H01L23/5283 ,  H01L29/41733 ,  H01L29/42372 ,  H01L29/42392 ,  H01L29/456 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L29/78696

Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain pattern on the substrate, the source/drain pattern being at a side of the gate structure, a source/drain contact filling on and connected to the source/drain pattern, an entire top surface of the source/drain contact filling being lower than a top surface of the gate structure, and a connection contact directly on and connected to the source/drain contact filling, a top surface of the connection contact being higher than the top surface of the gate structure.

公开(公告)号：US10978368B2

公开(公告)日：2021-04-13

申请号：US16460679

申请日：2019-07-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ho Sung Cho ,  Sang Kweon Lee ,  Sang Young Kim

IPC: H01L21/78 ,  H01L23/31 ,  H01L23/00

Abstract: A semiconductor device is provided. The semiconductor device includes a substrate, an insulating film, and a photo sensitive film. The substrate includes a semiconductor chip region and a scribe line region disposed along an edge of the semiconductor chip region. The insulating film includes a first portion disposed on the semiconductor chip region, a second portion disposed on the scribe line region and connected with the first portion, and a third portion disposed on the scribe line region and protruded in a first direction from the second portion. The photo sensitive film is disposed on the insulating film and has a sidewall exposed on the second portion of the insulating film. A first width of the third portion in a second direction perpendicular to the first direction decreases as a distance from the semiconductor chip region increases.

公开(公告)号：US10886404B2

公开(公告)日：2021-01-05

申请号：US16514067

申请日：2019-07-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang Young Kim ,  Deok Han Bae ,  Byung Chan Ryu ,  Da Un Jeon

IPC: H01L29/78 ,  H01L21/768 ,  H01L23/485 ,  H01L29/49

Abstract: A semiconductor device includes a first active region that extends on a substrate in a first direction, a second active region that extends in parallel with the first active region, an element isolation region between the first and second active regions, a gate structure that extends in a second direction different from the first direction, and intersects the first and second active regions, a lower contact spaced apart from the gate structure in the first direction, the lower contact being on the first active region, the element isolation region, and the second active region, and an upper contact on the lower contact between the first active region and the second active region. A width of the lower contact in the first direction that is on the first active region m narrower than a width of the lower contact in the first direction that is on the element isolation region.

公开(公告)号：US10141447B2

公开(公告)日：2018-11-27

申请号：US15841515

申请日：2017-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Ho You ,  Deok Han Bae ,  Sang Young Kim

IPC: H01L29/786 ,  H01L23/535 ,  H01L27/092 ,  H01L29/08 ,  H01L29/45 ,  H01L29/16 ,  H01L29/417 ,  H01L29/161

Abstract: A semiconductor device includes an active fin extended in a first direction on a substrate. A gate structure extends in a second direction, wherein the gate structure intersects the active fin and covers an upper portion of the active fin. A source/drain region is positioned on the active fin adjacent to the gate structure. A silicide layer is on the source/drain region. A contact plug is connected to the source/drain region. A void is present between the silicide layer and the contact plug.

公开(公告)号：US10374085B2

公开(公告)日：2019-08-06

申请号：US15997793

申请日：2018-06-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sang Young Kim ,  Deok Han Bae ,  Byung Chan Ryu ,  Da Un Jeon

IPC: H01L27/108 ,  H01L29/78 ,  H01L21/768 ,  H01L23/485

Abstract: A semiconductor device includes a first active region that extends on a substrate in a first direction, a second active region that extends in parallel with the first active region, an element isolation region between the first and second active regions, a gate structure that extends in a second direction different from the first direction, and intersects the first and second active regions, a lower contact spaced apart from the gate structure in the first direction, the lower contact being on the first active region, the element isolation region, and the second active region, and an upper contact on the lower contact between the first active region and the second active region. A width of the lower contact in the first direction that is on the first active region m narrower than a width of the lower contact in the first direction that is on the element isolation region.

公开(公告)号：US10361159B2

公开(公告)日：2019-07-23

申请号：US15820509

申请日：2017-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Ho You ,  Sang Young Kim ,  Byung Chan Ryu

IPC: H01L21/76 ,  H01L21/82 ,  H01L29/41 ,  H01L29/66 ,  H01L29/78 ,  H01L23/528 ,  H01L23/522 ,  H01L29/417 ,  H01L21/768 ,  H01L29/45 ,  H01L21/8234 ,  H01L23/532

Abstract: A semiconductor device includes a substrate having a plurality of fins protruding therefrom and an active region on the fins. The device further includes a contact including a conductive region having a concave portion defining an upper portion and a lower portion of the conductive region, an interlayer insulating layer on the active region, and a side insulating layer interposed between the interlayer insulating layer and the lower portion of the conductive region.

公开(公告)号：US20180286810A1

公开(公告)日：2018-10-04

申请号：US15841515

申请日：2017-12-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Ho You ,  Deok Han Bae ,  Sang Young Kim

IPC: H01L23/535 ,  H01L27/092 ,  H01L29/08 ,  H01L29/161 ,  H01L29/16 ,  H01L29/417 ,  H01L29/45

CPC classification number: H01L29/78618 ,  H01L23/535 ,  H01L27/0924 ,  H01L29/0843 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/41725 ,  H01L29/41766 ,  H01L29/45

Abstract: A semiconductor device includes an active fin extended in a first direction on a substrate. A gate structure extends in a second direction, wherein the gate structure intersects the active fin and covers an upper portion of the active fin. A source/drain region is positioned on the active fin adjacent to the gate structure. A silicide layer is on the source/drain region. A contact plug is connected to the source/drain region. Avoid is present between the silicide layer and the contact plug.

公开(公告)号：US20180286808A1

公开(公告)日：2018-10-04

申请号：US15820509

申请日：2017-11-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Ho You ,  Sang Young Kim ,  Byung Chan Ryu

IPC: H01L23/528 ,  H01L23/522 ,  H01L29/78 ,  H01L29/417 ,  H01L29/45 ,  H01L21/768

CPC classification number: H01L23/5283 ,  H01L21/76831 ,  H01L21/76846 ,  H01L21/823431 ,  H01L23/5226 ,  H01L23/53223 ,  H01L23/53266 ,  H01L29/41791 ,  H01L29/456 ,  H01L29/66795 ,  H01L29/7851 ,  H01L2029/7858

Abstract: A semiconductor device includes a substrate having a plurality of fins protruding therefrom and an active region on the fins. The device further includes a contact including a conductive region having a concave portion defining an upper portion and a lower portion of the conductive region, an interlayer insulating layer on the active region, and a side insulating layer interposed between the interlayer insulating layer and the lower portion of the conductive region.

公开(公告)号：US11362211B2

公开(公告)日：2022-06-14

申请号：US17137850

申请日：2020-12-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang Young Kim ,  Deok Han Bae ,  Byung Chan Ryu ,  Da Un Jeon

IPC: H01L29/78 ,  H01L21/768 ,  H01L23/485 ,  H01L29/49

Abstract: A semiconductor device includes a first active region that extends on a substrate in a first direction, a second active region that extends in parallel with the first active region, an element isolation region between the first and second active regions, a gate structure that extends in a second direction different from the first direction, and intersects the first and second active regions, a lower contact spaced apart from the gate structure in the first direction, the lower contact being on the first active region, the element isolation region, and the second active region, and an upper contact on the lower contact between the first active region and the second active region. A width of the lower contact in the first direction that is on the first active region m narrower than a width of the lower contact in the first direction that is on the element isolation region.