公开(公告)号：US09147500B2

公开(公告)日：2015-09-29

申请号：US13945007

申请日：2013-07-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hye-Jin Kim ,  Hyung-Rok Oh ,  Dong-Seok Kang ,  Dong-Hyun Sohn ,  Sang-Beom Kang ,  Chul-Woo Park ,  Yun-Sang Lee

IPC: G11C11/00 ,  G11C29/10 ,  G11C11/16 ,  G11C29/32 ,  G11C29/34 ,  G11C29/26

CPC classification number: G11C29/10 ,  G11C11/16 ,  G11C11/161 ,  G11C11/165 ,  G11C11/1673 ,  G11C11/1675 ,  G11C29/32 ,  G11C29/34 ,  G11C2029/2602

Abstract: A semiconductor memory device includes a memory cell array, a mode register set and a test circuit. The memory cell array includes a plurality of wordlines, a plurality of bitlines, and a plurality of spin-transfer torque magneto-resistive random access memory (STT-MRAM) cells, and each STT-MRAM cell disposed in a cross area of each wordline and bitline, and the STT-MRAM cell includes a magnetic tunnel junction (MTJ) element and a cell transistor. A gate of the cell transistor is coupled to a wordline, a first electrode of the cell transistor is coupled to a bitline via the MTJ element, and a second electrode of the cell transistor is coupled to a source line. The mode register set is configured to set a test mode, and the test circuit is configured to perform a test operation by using the mode register set.

Abstract translation: 半导体存储器件包括存储单元阵列，模式寄存器组和测试电路。 存储单元阵列包括多个字线，多个位线和多个自旋转移转矩磁阻随机存取存储器（STT-MRAM）单元，每个STT-MRAM单元设置在每个字线的交叉区域 和位线，并且STT-MRAM单元包括磁隧道结（MTJ）元件和单元晶体管。 单元晶体管的栅极耦合到字线，单元晶体管的第一电极通过MTJ元件耦合到位线，并且单元晶体管的第二电极耦合到源极线。 模式寄存器组被配置为设置测试模式，并且测试电路被配置为通过使用模式寄存器集执行测试操作。