SUBSTRATE STRUCTURES AND SEMICONDUCTOR DEVICES EMPLOYING THE SAME
    1.
    发明申请
    SUBSTRATE STRUCTURES AND SEMICONDUCTOR DEVICES EMPLOYING THE SAME 审中-公开
    使用其的基板结构和半导体器件

    公开(公告)号:US20140299885A1

    公开(公告)日:2014-10-09

    申请号:US14070964

    申请日:2013-11-04

    Abstract: A substrate structure includes a substrate, a nucleation layer on the substrate and including a group III-V compound semiconductor material having a lattice constant that is different from that of the substrate by less than 1%, and a buffer layer on the nucleation layer and including first and second layers, wherein the first and second layers include group III-V compound semiconductor materials having lattice constants that are greater than that of the nucleation layer by 4% or more.

    Abstract translation: 衬底结构包括衬底,在衬底上的成核层,并且包括具有不同于衬底的晶格常数小于1%的晶格常数的III-V族化合物半导体材料,以及成核层上的缓冲层和 包括第一层和第二层,其中第一层和第二层包括具有大于成核层的晶格常数4%或更多的晶格常数的III-V族化合物半导体材料。

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME

    公开(公告)号:US20130341595A1

    公开(公告)日:2013-12-26

    申请号:US13789873

    申请日:2013-03-08

    Abstract: Semiconductor devices including a substrate (e.g., silicon substrate), a multi-layer structure disposed on a portion of the substrate, and at least one electrode disposed on the multi-layer structure and methods of manufacturing the same are provided. The multi-layer structure may include an active layer containing a Group III-V material and a current blocking layer disposed between the substrate and the active layer. The semiconductor device may further include a buffer layer disposed between the substrate and the active layer. In a case that the substrate is a p-type, the buffer layer may be an n-type material layer and the current blocking layer may be a p-type material layer. The current blocking layer may contain a Group III-V material. A mask layer having an opening may be disposed on the substrate so that the multi-layer structure may be disposed on the portion of the substrate exposed by the opening.

    DISPLAY APPARATUS AND RECORDING MEDIUM
    5.
    发明申请

    公开(公告)号:US20190320114A1

    公开(公告)日:2019-10-17

    申请号:US16317424

    申请日:2017-05-22

    Abstract: A display apparatus including: a display; a loudspeaker; a user input unit; a video processor configured to process a video signal to be displayed as an image on the display, and change a viewpoint of the image displayed on the display in response to a user input made through the user input unit; and an audio processor configured to process an audio signal to be output as a sound from the loudspeaker, determine acoustic features of the audio signal, and adjust the output of the sound from the loudspeaker according to the acoustic features in response to the user input.

    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME
    8.
    发明申请
    SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME 审中-公开
    半导体器件及其制造方法

    公开(公告)号:US20150041764A1

    公开(公告)日:2015-02-12

    申请号:US14521910

    申请日:2014-10-23

    Abstract: Semiconductor devices including a substrate (e.g., silicon substrate), a multi-layer structure disposed on a portion of the substrate, and at least one electrode disposed on the multi-layer structure and methods of manufacturing the same are provided. The multi-layer structure may include an active layer containing a Group III-V material and a current blocking layer disposed between the substrate and the active layer. The semiconductor device may further include a buffer layer disposed between the substrate and the active layer. In a case that the substrate is a p-type, the buffer layer may be an n-type material layer and the current blocking layer may be a p-type material layer. The current blocking layer may contain a Group III-V material. A mask layer having an opening may be disposed on the substrate so that the multi-layer structure may be disposed on the portion of the substrate exposed by the opening.

    Abstract translation: 提供了包括衬底(例如,硅衬底),设置在衬底的一部分上的多层结构以及设置在多层结构上的至少一个电极的半导体器件及其制造方法。 多层结构可以包括含有III-V族材料的有源层和设置在衬底和有源层之间的电流阻挡层。 半导体器件还可以包括设置在衬底和有源层之间的缓冲层。 在基板是p型的情况下,缓冲层可以是n型材料层,电流阻挡层可以是p型材料层。 电流阻挡层可以含有III-V族材料。 具有开口的掩模层可以设置在基板上,使得多层结构可以设置在由开口暴露的基板的部分上。

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